lib/intel_iosf: add second phy support

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
This commit is contained in:
Ville Syrjälä 2014-05-28 18:26:39 +03:00 committed by Imre Deak
parent 82fcb90619
commit 0f906083f2
2 changed files with 9 additions and 2 deletions

View File

@ -137,7 +137,10 @@ uint32_t intel_dpio_reg_read(uint32_t reg, int phy)
{
uint32_t val;
vlv_sideband_rw(IOSF_PORT_DPIO, SB_MRD_NP, reg, &val);
if (phy == 0)
vlv_sideband_rw(IOSF_PORT_DPIO, SB_MRD_NP, reg, &val);
else
vlv_sideband_rw(IOSF_PORT_DPIO_2, SB_MRD_NP, reg, &val);
return val;
}
@ -151,7 +154,10 @@ uint32_t intel_dpio_reg_read(uint32_t reg, int phy)
*/
void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy)
{
vlv_sideband_rw(IOSF_PORT_DPIO, SB_MWR_NP, reg, &val);
if (phy == 0)
vlv_sideband_rw(IOSF_PORT_DPIO, SB_MWR_NP, reg, &val);
else
vlv_sideband_rw(IOSF_PORT_DPIO_2, SB_MWR_NP, reg, &val);
}
uint32_t intel_flisdsi_reg_read(uint32_t reg)

View File

@ -3568,6 +3568,7 @@ typedef enum {
#define IOSF_PORT_PUNIT 0x4
#define IOSF_PORT_NC 0x11
#define IOSF_PORT_DPIO 0x12
#define IOSF_PORT_DPIO_2 0x1a
#define IOSF_PORT_GPIO_NC 0x13
#define IOSF_PORT_CCK 0x14
#define IOSF_PORT_CCU 0xA9