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tools/null_state_gen: Add Gen8 golden state
Previously we didn't have a clear understanding what is necessary
for a pipeline state to be properly initialized. So we had to improvise
and use a stripped out render copy.
Now we have a more clear understanding so switch out render copy based
frankenstate to state we can call golden state.
v2: - export intel_batch_state_offset
- add 3DSTATE_RASTER (Bradley Volkin)
Cc: Volkin, Bradley D <bradley.d.volkin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
This commit is contained in:
+3
-2
@@ -41,7 +41,7 @@
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/* These two are BLC and CTG only, not BW or CL */
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#define GEN6_3DSTATE_AA_LINE_PARAMS GEN6_3D(3, 1, 0xa)
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#define GEN6_3DSTATE_GS_SVB_INDEX GEN6_3D(3, 1, 0xb)
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#define GEN6_3DSTATE_MONOFILTER_SIZE GEN6_3D(3, 1, 0x11)
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#define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0)
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#define GEN6_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 1, 0x10)
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@@ -91,6 +91,7 @@
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# define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29
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# define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27
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# define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25
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# define GEN6_3DSTATE_SF_VERTEX_SUB_PIXEL_PRECISION_SHIFT 12
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#define GEN6_3DSTATE_WM GEN6_3D(3, 0, 0x14)
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/* DW2 */
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@@ -303,7 +304,6 @@
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#define GEN6_EU_ATT_CLR_1 0x8834
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#define GEN6_EU_RDATA 0x8840
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#define GEN6_PIPE_CONTROL GEN6_3D(3, 2, 0)
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#define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0)
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@@ -411,6 +411,7 @@
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/* for GEN6_STATE_BASE_ADDRESS */
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#define BASE_ADDRESS_MODIFY (1 << 0)
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#define BUFFER_SIZE_MODIFY (1 << 0)
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/* for GEN6_3DSTATE_PIPELINED_POINTERS */
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#define GEN6_GS_DISABLE 0
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