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tools/null_state_gen: Add Gen8 golden state
Previously we didn't have a clear understanding what is necessary for a pipeline state to be properly initialized. So we had to improvise and use a stripped out render copy. Now we have a more clear understanding so switch out render copy based frankenstate to state we can call golden state. v2: - export intel_batch_state_offset - add 3DSTATE_RASTER (Bradley Volkin) Cc: Volkin, Bradley D <bradley.d.volkin@intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
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@ -41,7 +41,7 @@
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/* These two are BLC and CTG only, not BW or CL */
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#define GEN6_3DSTATE_AA_LINE_PARAMS GEN6_3D(3, 1, 0xa)
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#define GEN6_3DSTATE_GS_SVB_INDEX GEN6_3D(3, 1, 0xb)
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#define GEN6_3DSTATE_MONOFILTER_SIZE GEN6_3D(3, 1, 0x11)
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#define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0)
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#define GEN6_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 1, 0x10)
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@ -91,6 +91,7 @@
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# define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29
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# define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27
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# define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25
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# define GEN6_3DSTATE_SF_VERTEX_SUB_PIXEL_PRECISION_SHIFT 12
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#define GEN6_3DSTATE_WM GEN6_3D(3, 0, 0x14)
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/* DW2 */
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@ -303,7 +304,6 @@
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#define GEN6_EU_ATT_CLR_1 0x8834
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#define GEN6_EU_RDATA 0x8840
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#define GEN6_PIPE_CONTROL GEN6_3D(3, 2, 0)
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#define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0)
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@ -411,6 +411,7 @@
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/* for GEN6_STATE_BASE_ADDRESS */
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#define BASE_ADDRESS_MODIFY (1 << 0)
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#define BUFFER_SIZE_MODIFY (1 << 0)
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/* for GEN6_3DSTATE_PIPELINED_POINTERS */
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#define GEN6_GS_DISABLE 0
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@ -8,6 +8,8 @@
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#define GEN7_3DSTATE_URB_DS (0x7832 << 16)
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#define GEN7_3DSTATE_URB_GS (0x7833 << 16)
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# define GEN7_WM_LEGACY_DIAMOND_LINE_RASTERIZATION (1 << 26)
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#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS GEN6_3D(3, 0, 0xf)
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#define GEN7_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 0, 0x04)
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#define GEN7_3DSTATE_DEPTH_BUFFER GEN6_3D(3, 0, 0x05)
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@ -29,6 +31,7 @@
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#define GEN7_3DSTATE_CONSTANT_GS GEN6_3D(3, 0, 0x16)
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#define GEN7_3DSTATE_CONSTANT_HS GEN6_3D(3, 0, 0x19)
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#define GEN7_3DSTATE_CONSTANT_DS GEN6_3D(3, 0, 0x1a)
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#define GEN7_3DSTATE_CONSTANT_PS GEN6_3D(3, 0, 0x17)
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#define GEN7_3DSTATE_HS GEN6_3D(3, 0, 0x1b)
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#define GEN7_3DSTATE_TE GEN6_3D(3, 0, 0x1c)
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#define GEN7_3DSTATE_DS GEN6_3D(3, 0, 0x1d)
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@ -44,6 +47,12 @@
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# define GEN8_RASTER_FRONT_WINDING_CCW (1 << 21)
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# define GEN8_RASTER_CULL_NONE (1 << 16)
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#define GEN7_3DSTATE_PS GEN6_3D(3, 0, 0x20)
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# define GEN7_PS_SPF_MODE (1 << 31)
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# define GEN7_SF_POINT_WIDTH_FROM_SOURCE (1 << 11)
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# define GEN7_VS_FLOATING_POINT_MODE_ALTERNATE (1 << 16)
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#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP \
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GEN6_3D(3, 0, 0x21)
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#define GEN8_3DSTATE_PS_BLEND GEN6_3D(3, 0, 0x4d)
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@ -68,14 +77,26 @@
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#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS GEN6_3D(3, 0, 0x2e)
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#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS GEN6_3D(3, 0, 0x2f)
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#define GEN8_3DSTATE_VF GEN6_3D(3, 0, 0x0c)
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#define GEN8_3DSTATE_VF_TOPOLOGY GEN6_3D(3, 0, 0x4b)
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#define GEN8_3DSTATE_BIND_TABLE_POOL_ALLOC GEN6_3D(3, 1, 0x19)
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#define GEN8_3DSTATE_GATHER_POOL_ALLOC GEN6_3D(3, 1, 0x1a)
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#define GEN8_3DSTATE_DX9_CONSTANT_BUFFER_POOL_ALLOC GEN6_3D(3, 1, 0x1b)
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#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS GEN6_3D(3, 1, 0x12)
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#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS GEN6_3D(3, 1, 0x13)
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#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS GEN6_3D(3, 1, 0x14)
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#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS GEN6_3D(3, 1, 0x15)
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#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS GEN6_3D(3, 1, 0x16)
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#define GEN8_3DSTATE_VF_SGVS GEN6_3D(3, 0, 0x4a)
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#define GEN8_3DSTATE_SO_DECL_LIST GEN6_3D(3, 1, 0x17)
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#define GEN8_3DSTATE_SO_BUFFER GEN6_3D(3, 1, 0x18)
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#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET GEN6_3D(3, 1, 0x06)
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#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN GEN6_3D(3, 1, 0x07)
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#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0 GEN6_3D(3, 1, 0x02)
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#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 GEN6_3D(3, 1, 0x0c)
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/* Some random bits that we care about */
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#define GEN7_VB0_BUFFER_ADDR_MOD_EN (1 << 14)
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#define GEN7_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11)
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@ -84,6 +105,9 @@
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/* Random shifts */
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#define GEN8_3DSTATE_PS_MAX_THREADS_SHIFT 23
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/* STATE_BASE_ADDRESS state size in pages*/
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#define GEN8_STATE_SIZE_PAGES(x) ((x) << 12)
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/* Shamelessly ripped from mesa */
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struct gen8_surface_state
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{
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@ -84,7 +84,7 @@ uint32_t intel_batch_state_copy(struct intel_batchbuffer *batch, void *d, unsign
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const char *name);
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uint32_t intel_batch_state_alloc(struct intel_batchbuffer *batch, unsigned bytes, unsigned align,
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const char *name);
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uint32_t intel_batch_state_offset(struct intel_batchbuffer *batch, unsigned align);
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unsigned intel_batch_num_cmds(struct intel_batchbuffer *batch);
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struct bb_item *intel_batch_cmd_get(struct intel_batchbuffer *batch, unsigned i);
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