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Code Issues Releases Wiki Activity

Tweak formatting rules

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This commit is contained in:
Allen Hill 2023-09-17 12:09:09 -04:00
parent 1d6690a234
commit 17f5510b16
5 changed files with 27 additions and 25 deletions
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2
.clang-format
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@ -4,4 +4,6 @@ UseCRLF: false
BreakBeforeBraces: Attach
AllowShortBlocksOnASingleLine: Empty
IndentCaseLabels: true
IndentPPDirectives: BeforeHash
AlignConsecutiveMacros: Consecutive
...

6
src/avclandrv.c
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@ -118,7 +118,7 @@
// Name difference between avr-libc and Microchip pack
#if defined(EVSYS_ASYNCCH00_bm)
#define EVSYS_ASYNCCH0_0_bm EVSYS_ASYNCCH00_bm
#define EVSYS_ASYNCCH0_0_bm EVSYS_ASYNCCH00_bm
#endif
#define READING_BYTE GPIOR1
@ -284,9 +284,9 @@ void AVCLAN_init() {
// TCB0 for read bit timing
#ifdef SOFTWARE_DEBUG
#define TCB_CNTMODE TCB_CNTMODE_FRQPW_gc
#define TCB_CNTMODE TCB_CNTMODE_FRQPW_gc
#else
#define TCB_CNTMODE TCB_CNTMODE_PW_gc
#define TCB_CNTMODE TCB_CNTMODE_PW_gc
#endif
TCB0.CTRLB = TCB_CNTMODE;

4
src/com232.c
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@ -29,9 +29,9 @@
#include "timing.h"
#if USART_RXMODE == USART_RXMODE_CLK2X_gc
#define RXMODE_S 8
#define RXMODE_S 8
#elif USART_RXMODE == USART_RXMODE_NORMAL_gc
#define RXMODE_S 16
#define RXMODE_S 16
#endif
#define USART_BAUD_RATE(BAUD_RATE) \

26
src/timing.h
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@ -14,39 +14,39 @@
#define __CLKCTRL_PDIV_48X_gc 48
#if CLK_PRESCALE == 0x01
#define F_CPU (FREQSEL / __CLK_PRESCALE_DIV)
#define CYCLE_MUL __CLK_PRESCALE_DIV
#define F_CPU (FREQSEL / __CLK_PRESCALE_DIV)
#define CYCLE_MUL __CLK_PRESCALE_DIV
#else
#define F_CPU (FREQSEL)
#define CYCLE_MUL 1
#define F_CPU (FREQSEL)
#define CYCLE_MUL 1
#endif
#if FREQSEL == 20000000L
#define CPU_CYCLE (50 * CYCLE_MUL)
#define CPU_CYCLE (50 * CYCLE_MUL)
#elif FREQSEL == 16000000L
#define CPU_CYCLE (62.5 * CYCLE_MUL)
#define CPU_CYCLE (62.5 * CYCLE_MUL)
#else
#error "Not implemented"
#error "Not implemented"
#endif
#ifndef TCB_CLKSEL_CLKDIV1_gc
#define TCB_CLKSEL_CLKDIV1_gc (0x00 << 1)
#define TCB_CLKSEL_CLKDIV1_gc (0x00 << 1)
#endif
#ifndef TCB_CLKSEL_CLKDIV2_gc
#define TCB_CLKSEL_CLKDIV2_gc (0x01 << 1)
#define TCB_CLKSEL_CLKDIV2_gc (0x01 << 1)
#endif
#ifndef TCB_CLKSEL_CLKTCA_gc
#define TCB_CLKSEL_CLKTCA_gc (0x02 << 1)
#define TCB_CLKSEL_CLKTCA_gc (0x02 << 1)
#endif
#if TCB_CLKSEL == TCB_CLKSEL_CLKDIV1_gc
#define TCB_TICK (CPU_CYCLE)
#define TCB_TICK (CPU_CYCLE)
#elif TCB_CLKSEL == TCB_CLKSEL_CLKDIV2_gc
#define TCB_TICK (CPU_CYCLE * 2)
#define TCB_TICK (CPU_CYCLE * 2)
#elif TCB_CLKSEL == TCB_CLKSEL_CLKTCA_gc
#error "Not implemented"
#error "Not implemented"
#endif
// Measured at ±0.02 μs @ F_CPU=20MHz, TCB_CLKSEL=TCB_CLKSEL_CLKDIV1_gc