From 17f5510b16e96528c7c881e53afbbf363b78484c Mon Sep 17 00:00:00 2001 From: Allen Hill Date: Sun, 17 Sep 2023 12:09:09 -0400 Subject: [PATCH] Tweak formatting rules --- .clang-format | 2 ++ src/avclandrv.c | 10 +++++----- src/com232.c | 4 ++-- src/sniffer.c | 2 +- src/timing.h | 34 +++++++++++++++++----------------- 5 files changed, 27 insertions(+), 25 deletions(-) diff --git a/.clang-format b/.clang-format index 95552eb..9751a30 100644 --- a/.clang-format +++ b/.clang-format @@ -4,4 +4,6 @@ UseCRLF: false BreakBeforeBraces: Attach AllowShortBlocksOnASingleLine: Empty IndentCaseLabels: true +IndentPPDirectives: BeforeHash +AlignConsecutiveMacros: Consecutive ... diff --git a/src/avclandrv.c b/src/avclandrv.c index 9560e17..db6e5d1 100644 --- a/src/avclandrv.c +++ b/src/avclandrv.c @@ -118,11 +118,11 @@ // Name difference between avr-libc and Microchip pack #if defined(EVSYS_ASYNCCH00_bm) -#define EVSYS_ASYNCCH0_0_bm EVSYS_ASYNCCH00_bm + #define EVSYS_ASYNCCH0_0_bm EVSYS_ASYNCCH00_bm #endif -#define READING_BYTE GPIOR1 -#define READING_NBITS GPIOR2 +#define READING_BYTE GPIOR1 +#define READING_NBITS GPIOR2 #define READING_PARITY GPIOR3 uint16_t CD_ID; @@ -284,9 +284,9 @@ void AVCLAN_init() { // TCB0 for read bit timing #ifdef SOFTWARE_DEBUG -#define TCB_CNTMODE TCB_CNTMODE_FRQPW_gc + #define TCB_CNTMODE TCB_CNTMODE_FRQPW_gc #else -#define TCB_CNTMODE TCB_CNTMODE_PW_gc + #define TCB_CNTMODE TCB_CNTMODE_PW_gc #endif TCB0.CTRLB = TCB_CNTMODE; diff --git a/src/com232.c b/src/com232.c index 1e8a827..9765f53 100644 --- a/src/com232.c +++ b/src/com232.c @@ -29,9 +29,9 @@ #include "timing.h" #if USART_RXMODE == USART_RXMODE_CLK2X_gc -#define RXMODE_S 8 + #define RXMODE_S 8 #elif USART_RXMODE == USART_RXMODE_NORMAL_gc -#define RXMODE_S 16 + #define RXMODE_S 16 #endif #define USART_BAUD_RATE(BAUD_RATE) \ diff --git a/src/sniffer.c b/src/sniffer.c index 6bbaf6c..4c8c211 100644 --- a/src/sniffer.c +++ b/src/sniffer.c @@ -31,7 +31,7 @@ #include "com232.h" #define EV_NOTHING 0 -#define EV_STATUS 4 +#define EV_STATUS 4 uint8_t Event; uint8_t echoCharacters; diff --git a/src/timing.h b/src/timing.h index 21c0f00..e93cd8f 100644 --- a/src/timing.h +++ b/src/timing.h @@ -1,52 +1,52 @@ #ifndef _TIMING_HPP_ #define _TIMING_HPP_ -#define __CLKCTRL_PDIV_2X_gc 2 -#define __CLKCTRL_PDIV_4X_gc 4 -#define __CLKCTRL_PDIV_8X_gc 8 +#define __CLKCTRL_PDIV_2X_gc 2 +#define __CLKCTRL_PDIV_4X_gc 4 +#define __CLKCTRL_PDIV_8X_gc 8 #define __CLKCTRL_PDIV_16X_gc 16 #define __CLKCTRL_PDIV_32X_gc 32 #define __CLKCTRL_PDIV_64X_gc 64 -#define __CLKCTRL_PDIV_6X_gc 6 +#define __CLKCTRL_PDIV_6X_gc 6 #define __CLKCTRL_PDIV_10X_gc 10 #define __CLKCTRL_PDIV_12X_gc 12 #define __CLKCTRL_PDIV_24X_gc 24 #define __CLKCTRL_PDIV_48X_gc 48 #if CLK_PRESCALE == 0x01 -#define F_CPU (FREQSEL / __CLK_PRESCALE_DIV) -#define CYCLE_MUL __CLK_PRESCALE_DIV + #define F_CPU (FREQSEL / __CLK_PRESCALE_DIV) + #define CYCLE_MUL __CLK_PRESCALE_DIV #else -#define F_CPU (FREQSEL) -#define CYCLE_MUL 1 + #define F_CPU (FREQSEL) + #define CYCLE_MUL 1 #endif #if FREQSEL == 20000000L -#define CPU_CYCLE (50 * CYCLE_MUL) + #define CPU_CYCLE (50 * CYCLE_MUL) #elif FREQSEL == 16000000L -#define CPU_CYCLE (62.5 * CYCLE_MUL) + #define CPU_CYCLE (62.5 * CYCLE_MUL) #else -#error "Not implemented" + #error "Not implemented" #endif #ifndef TCB_CLKSEL_CLKDIV1_gc -#define TCB_CLKSEL_CLKDIV1_gc (0x00 << 1) + #define TCB_CLKSEL_CLKDIV1_gc (0x00 << 1) #endif #ifndef TCB_CLKSEL_CLKDIV2_gc -#define TCB_CLKSEL_CLKDIV2_gc (0x01 << 1) + #define TCB_CLKSEL_CLKDIV2_gc (0x01 << 1) #endif #ifndef TCB_CLKSEL_CLKTCA_gc -#define TCB_CLKSEL_CLKTCA_gc (0x02 << 1) + #define TCB_CLKSEL_CLKTCA_gc (0x02 << 1) #endif #if TCB_CLKSEL == TCB_CLKSEL_CLKDIV1_gc -#define TCB_TICK (CPU_CYCLE) + #define TCB_TICK (CPU_CYCLE) #elif TCB_CLKSEL == TCB_CLKSEL_CLKDIV2_gc -#define TCB_TICK (CPU_CYCLE * 2) + #define TCB_TICK (CPU_CYCLE * 2) #elif TCB_CLKSEL == TCB_CLKSEL_CLKTCA_gc -#error "Not implemented" + #error "Not implemented" #endif // Measured at ±0.02 μs @ F_CPU=20MHz, TCB_CLKSEL=TCB_CLKSEL_CLKDIV1_gc