mirror of
https://github.com/halleysfifthinc/Toyota-AVC-LAN
synced 2025-06-07 16:06:12 +00:00
Tweak formatting rules
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parent
1d6690a234
commit
17f5510b16
@ -4,4 +4,6 @@ UseCRLF: false
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BreakBeforeBraces: Attach
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BreakBeforeBraces: Attach
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AllowShortBlocksOnASingleLine: Empty
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AllowShortBlocksOnASingleLine: Empty
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IndentCaseLabels: true
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IndentCaseLabels: true
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IndentPPDirectives: BeforeHash
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AlignConsecutiveMacros: Consecutive
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...
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...
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@ -118,11 +118,11 @@
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// Name difference between avr-libc and Microchip pack
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// Name difference between avr-libc and Microchip pack
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#if defined(EVSYS_ASYNCCH00_bm)
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#if defined(EVSYS_ASYNCCH00_bm)
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#define EVSYS_ASYNCCH0_0_bm EVSYS_ASYNCCH00_bm
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#define EVSYS_ASYNCCH0_0_bm EVSYS_ASYNCCH00_bm
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#endif
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#endif
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#define READING_BYTE GPIOR1
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#define READING_BYTE GPIOR1
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#define READING_NBITS GPIOR2
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#define READING_NBITS GPIOR2
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#define READING_PARITY GPIOR3
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#define READING_PARITY GPIOR3
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uint16_t CD_ID;
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uint16_t CD_ID;
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@ -284,9 +284,9 @@ void AVCLAN_init() {
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// TCB0 for read bit timing
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// TCB0 for read bit timing
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#ifdef SOFTWARE_DEBUG
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#ifdef SOFTWARE_DEBUG
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#define TCB_CNTMODE TCB_CNTMODE_FRQPW_gc
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#define TCB_CNTMODE TCB_CNTMODE_FRQPW_gc
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#else
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#else
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#define TCB_CNTMODE TCB_CNTMODE_PW_gc
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#define TCB_CNTMODE TCB_CNTMODE_PW_gc
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#endif
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#endif
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TCB0.CTRLB = TCB_CNTMODE;
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TCB0.CTRLB = TCB_CNTMODE;
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@ -29,9 +29,9 @@
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#include "timing.h"
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#include "timing.h"
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#if USART_RXMODE == USART_RXMODE_CLK2X_gc
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#if USART_RXMODE == USART_RXMODE_CLK2X_gc
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#define RXMODE_S 8
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#define RXMODE_S 8
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#elif USART_RXMODE == USART_RXMODE_NORMAL_gc
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#elif USART_RXMODE == USART_RXMODE_NORMAL_gc
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#define RXMODE_S 16
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#define RXMODE_S 16
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#endif
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#endif
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#define USART_BAUD_RATE(BAUD_RATE) \
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#define USART_BAUD_RATE(BAUD_RATE) \
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@ -31,7 +31,7 @@
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#include "com232.h"
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#include "com232.h"
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#define EV_NOTHING 0
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#define EV_NOTHING 0
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#define EV_STATUS 4
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#define EV_STATUS 4
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uint8_t Event;
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uint8_t Event;
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uint8_t echoCharacters;
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uint8_t echoCharacters;
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34
src/timing.h
34
src/timing.h
@ -1,52 +1,52 @@
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#ifndef _TIMING_HPP_
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#ifndef _TIMING_HPP_
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#define _TIMING_HPP_
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#define _TIMING_HPP_
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#define __CLKCTRL_PDIV_2X_gc 2
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#define __CLKCTRL_PDIV_2X_gc 2
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#define __CLKCTRL_PDIV_4X_gc 4
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#define __CLKCTRL_PDIV_4X_gc 4
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#define __CLKCTRL_PDIV_8X_gc 8
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#define __CLKCTRL_PDIV_8X_gc 8
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#define __CLKCTRL_PDIV_16X_gc 16
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#define __CLKCTRL_PDIV_16X_gc 16
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#define __CLKCTRL_PDIV_32X_gc 32
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#define __CLKCTRL_PDIV_32X_gc 32
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#define __CLKCTRL_PDIV_64X_gc 64
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#define __CLKCTRL_PDIV_64X_gc 64
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#define __CLKCTRL_PDIV_6X_gc 6
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#define __CLKCTRL_PDIV_6X_gc 6
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#define __CLKCTRL_PDIV_10X_gc 10
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#define __CLKCTRL_PDIV_10X_gc 10
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#define __CLKCTRL_PDIV_12X_gc 12
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#define __CLKCTRL_PDIV_12X_gc 12
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#define __CLKCTRL_PDIV_24X_gc 24
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#define __CLKCTRL_PDIV_24X_gc 24
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#define __CLKCTRL_PDIV_48X_gc 48
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#define __CLKCTRL_PDIV_48X_gc 48
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#if CLK_PRESCALE == 0x01
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#if CLK_PRESCALE == 0x01
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#define F_CPU (FREQSEL / __CLK_PRESCALE_DIV)
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#define F_CPU (FREQSEL / __CLK_PRESCALE_DIV)
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#define CYCLE_MUL __CLK_PRESCALE_DIV
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#define CYCLE_MUL __CLK_PRESCALE_DIV
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#else
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#else
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#define F_CPU (FREQSEL)
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#define F_CPU (FREQSEL)
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#define CYCLE_MUL 1
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#define CYCLE_MUL 1
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#endif
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#endif
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#if FREQSEL == 20000000L
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#if FREQSEL == 20000000L
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#define CPU_CYCLE (50 * CYCLE_MUL)
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#define CPU_CYCLE (50 * CYCLE_MUL)
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#elif FREQSEL == 16000000L
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#elif FREQSEL == 16000000L
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#define CPU_CYCLE (62.5 * CYCLE_MUL)
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#define CPU_CYCLE (62.5 * CYCLE_MUL)
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#else
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#else
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#error "Not implemented"
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#error "Not implemented"
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#endif
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#endif
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#ifndef TCB_CLKSEL_CLKDIV1_gc
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#ifndef TCB_CLKSEL_CLKDIV1_gc
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#define TCB_CLKSEL_CLKDIV1_gc (0x00 << 1)
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#define TCB_CLKSEL_CLKDIV1_gc (0x00 << 1)
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#endif
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#endif
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#ifndef TCB_CLKSEL_CLKDIV2_gc
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#ifndef TCB_CLKSEL_CLKDIV2_gc
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#define TCB_CLKSEL_CLKDIV2_gc (0x01 << 1)
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#define TCB_CLKSEL_CLKDIV2_gc (0x01 << 1)
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#endif
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#endif
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#ifndef TCB_CLKSEL_CLKTCA_gc
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#ifndef TCB_CLKSEL_CLKTCA_gc
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#define TCB_CLKSEL_CLKTCA_gc (0x02 << 1)
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#define TCB_CLKSEL_CLKTCA_gc (0x02 << 1)
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#endif
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#endif
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#if TCB_CLKSEL == TCB_CLKSEL_CLKDIV1_gc
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#if TCB_CLKSEL == TCB_CLKSEL_CLKDIV1_gc
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#define TCB_TICK (CPU_CYCLE)
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#define TCB_TICK (CPU_CYCLE)
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#elif TCB_CLKSEL == TCB_CLKSEL_CLKDIV2_gc
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#elif TCB_CLKSEL == TCB_CLKSEL_CLKDIV2_gc
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#define TCB_TICK (CPU_CYCLE * 2)
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#define TCB_TICK (CPU_CYCLE * 2)
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#elif TCB_CLKSEL == TCB_CLKSEL_CLKTCA_gc
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#elif TCB_CLKSEL == TCB_CLKSEL_CLKTCA_gc
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#error "Not implemented"
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#error "Not implemented"
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#endif
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#endif
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// Measured at ±0.02 μs @ F_CPU=20MHz, TCB_CLKSEL=TCB_CLKSEL_CLKDIV1_gc
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// Measured at ±0.02 μs @ F_CPU=20MHz, TCB_CLKSEL=TCB_CLKSEL_CLKDIV1_gc
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