First commit, Working Version

This commit is contained in:
unknown
2012-07-17 20:09:48 -06:00
commit 91744bc720
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# Compiled source #
###################
*.#*
# Packages #
############
# it's better to unpack these files and commit the raw source
# git has its own built in compression methods
*.7z
*.dmg
*.gz
*.iso
*.jar
*.rar
*.tar
*.zip
# Logs and databases #
######################
*.log
*.sql
*.sqlite
# OS generated files #
######################
.DS_Store
.DS_Store?
._*
.Spotlight-V100
.Trashes
Icon?
ehthumbs.db
Thumbs.db
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<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="6.2">
<drawing>
<settings>
<setting alwaysvectorfont="no"/>
<setting verticaltext="up"/>
</settings>
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<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>
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<text x="-12.7" y="12.7" size="2.54" layer="97">FI212C245072-T</text>
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</symbol>
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<deviceset name="BLUETUNESROM">
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<devices>
<device name="" package="QFN-68">
<connects>
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<connect gate="G$1" pin="AIO[1]" pad="6"/>
<connect gate="G$1" pin="AU_REF_DCPL" pad="55"/>
<connect gate="G$1" pin="BAT_P" pad="38"/>
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<connect gate="G$1" pin="LED[1]" pad="33"/>
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<connect gate="G$1" pin="LX" pad="37"/>
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<connect gate="G$1" pin="MIC_A_P" pad="51"/>
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<connect gate="G$1" pin="NC@3" pad="41"/>
<connect gate="G$1" pin="NC@4" pad="42"/>
<connect gate="G$1" pin="NC@5" pad="43"/>
<connect gate="G$1" pin="NC@6" pad="44"/>
<connect gate="G$1" pin="NC@7" pad="49"/>
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<connect gate="G$1" pin="PIO[11]" pad="15"/>
<connect gate="G$1" pin="PIO[12]" pad="18"/>
<connect gate="G$1" pin="PIO[13]" pad="19"/>
<connect gate="G$1" pin="PIO[14]" pad="20"/>
<connect gate="G$1" pin="PIO[1]" pad="60"/>
<connect gate="G$1" pin="PIO[2]" pad="59"/>
<connect gate="G$1" pin="PIO[3]" pad="58"/>
<connect gate="G$1" pin="PIO[4]" pad="25"/>
<connect gate="G$1" pin="PIO[5]" pad="24"/>
<connect gate="G$1" pin="PIO[6]" pad="23"/>
<connect gate="G$1" pin="PIO[7]" pad="22"/>
<connect gate="G$1" pin="PIO[8]" pad="21"/>
<connect gate="G$1" pin="PIO[9]" pad="14"/>
<connect gate="G$1" pin="RF_N" pad="65"/>
<connect gate="G$1" pin="RF_P" pad="64"/>
<connect gate="G$1" pin="RST#" pad="26"/>
<connect gate="G$1" pin="SPI_CLK" pad="29"/>
<connect gate="G$1" pin="SPI_CS#" pad="30"/>
<connect gate="G$1" pin="SPI_MISO" pad="31"/>
<connect gate="G$1" pin="SPI_MOSI" pad="28"/>
<connect gate="G$1" pin="SPK_A_N" pad="56"/>
<connect gate="G$1" pin="SPK_A_P" pad="57"/>
<connect gate="G$1" pin="SPK_B_N" pad="53"/>
<connect gate="G$1" pin="SPK_B_P" pad="54"/>
<connect gate="G$1" pin="TEST_EN" pad="27"/>
<connect gate="G$1" pin="UART_CTS" pad="11"/>
<connect gate="G$1" pin="UART_RTS" pad="12"/>
<connect gate="G$1" pin="UART_RX" pad="10"/>
<connect gate="G$1" pin="UART_TX" pad="9"/>
<connect gate="G$1" pin="VDD_ANA" pad="2"/>
<connect gate="G$1" pin="VDD_AUDIO" pad="47"/>
<connect gate="G$1" pin="VDD_BUCK_CORE" pad="36"/>
<connect gate="G$1" pin="VDD_CHG" pad="39"/>
<connect gate="G$1" pin="VDD_CORE@1" pad="17"/>
<connect gate="G$1" pin="VDD_CORE@2" pad="34"/>
<connect gate="G$1" pin="VDD_LO" pad="67"/>
<connect gate="G$1" pin="VDD_PADS" pad="16"/>
<connect gate="G$1" pin="VDD_PIO" pad="62"/>
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<connect gate="G$1" pin="VDD_RADIO@2" pad="63"/>
<connect gate="G$1" pin="VDD_UART" pad="13"/>
<connect gate="G$1" pin="VREGENABLE_H" pad="35"/>
<connect gate="G$1" pin="VREGENABLE_L" pad="68"/>
<connect gate="G$1" pin="VREGIN_L" pad="1"/>
<connect gate="G$1" pin="VREGIN_L_AUDIO" pad="46"/>
<connect gate="G$1" pin="VSS_CNTR_PAD" pad="69"/>
<connect gate="G$1" pin="XTAL_IN" pad="3"/>
<connect gate="G$1" pin="XTAL_OUT" pad="4"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="FI212C245072-T">
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<device name="" package="FI212C">
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<connect gate="G$1" pin="BAL@2" pad="3"/>
<connect gate="G$1" pin="DC" pad="6"/>
<connect gate="G$1" pin="GND@1" pad="2"/>
<connect gate="G$1" pin="GND@2" pad="4"/>
<connect gate="G$1" pin="GND@3" pad="8"/>
<connect gate="G$1" pin="NC" pad="7"/>
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<deviceset name="ANT-2.45-CHP-T">
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<device name="" package="ANT-2.45-CHP-T">
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<technologies>
<technology name=""/>
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</device>
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<deviceset name="26MHZ-XTAL">
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<devices>
<device name="" package="26MHZ-CRYSTAL">
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<connect gate="G$1" pin="P$2" pad="P$3"/>
<connect gate="G$1" pin="P$3" pad="P$2"/>
<connect gate="G$1" pin="P$4" pad="P$4"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>
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<library>
<description>&lt;b&gt;Murata Filters&lt;/b&gt;&lt;p&gt;
Distributor RS Components&lt;p&gt;
&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
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<text x="-3.175" y="2.54" size="1.27" layer="25">&gt;NAME</text>
<text x="-3.175" y="-3.81" size="1.27" layer="27">&gt;VALUE</text>
</package>
<package name="CSTER12M">
<description>Source: http://search.murata.co.jp/Ceramy/CatalogshowpageAction.do?sDirnm=A07X&amp;sFilnm=81G07006&amp;sType=2&amp;sLang=en&amp;sNHinnm=CSTCR6M00G53Z-R0&amp;sCapt=Standard_Land_Pattern_Dimensions</description>
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<wire x1="-2.2" y1="0.95" x2="-2.2" y2="-0.95" width="0.1016" layer="21"/>
<smd name="1" x="-1.2" y="0" dx="0.4" dy="2.6" layer="1" stop="no" cream="no"/>
<smd name="2" x="0" y="0" dx="0.4" dy="2.6" layer="1" stop="no" cream="no"/>
<smd name="3" x="1.2" y="0" dx="0.4" dy="2.6" layer="1" stop="no" cream="no"/>
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</package>
<package name="NFM3DC">
<description>&lt;b&gt;NFM3DC/NFM3DP&lt;/b&gt; Reflow Soldering&lt;p&gt;
Source: http://search.murata.co.jp/Ceramy/image/img/A03X/MT_NFE.pdf</description>
<wire x1="-1.5" y1="0.525" x2="1.5" y2="0.525" width="0.2032" layer="51"/>
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<text x="-1.778" y="-3.048" size="1.27" layer="27">&gt;VALUE</text>
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<package name="NFM21C">
<description>&lt;b&gt;NFM21C/NFR21G/NFM21P/NFL21S&lt;/b&gt;&lt;p&gt;
Source: http://search.murata.co.jp/Ceramy/image/img/PDF/ENG/L0111S0109NFM21C.pdf&lt;br&gt;
http://search.murata.co.jp/Ceramy/image/img/A03X/MT_NFE.pdf</description>
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<smd name="2@1" x="0" y="-0.85" dx="0.6" dy="1.1" layer="1"/>
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<symbol name="LCL">
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<pin name="1" x="-5.08" y="2.54" visible="off" length="short" direction="pas"/>
<pin name="2" x="5.08" y="2.54" visible="off" length="short" direction="pas" rot="R180"/>
<pin name="GND" x="0" y="-5.08" visible="off" length="short" direction="pwr" swaplevel="1" rot="R90"/>
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<symbol name="LVL">
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<pin name="1" x="-5.08" y="2.54" visible="off" length="short" direction="pas"/>
<pin name="2" x="5.08" y="2.54" visible="off" length="short" direction="pas" rot="R180"/>
<pin name="GND" x="0" y="-5.08" visible="off" length="short" direction="pwr" swaplevel="1" rot="R90"/>
</symbol>
<symbol name="CST">
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<wire x1="5.08" y1="2.54" x2="5.08" y2="0" width="0.254" layer="94"/>
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<wire x1="0" y1="-5.08" x2="-5.08" y2="-5.08" width="0.254" layer="94"/>
<wire x1="-5.08" y1="-5.08" x2="-5.08" y2="0" width="0.254" layer="94"/>
<wire x1="-5.08" y1="0" x2="-5.08" y2="2.54" width="0.254" layer="94"/>
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<circle x="3.81" y="0" radius="0.254" width="0" layer="94"/>
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<pin name="1" x="-7.62" y="0" visible="pad" length="short" direction="pas"/>
<pin name="2" x="0" y="-7.62" visible="pad" length="short" direction="pas" rot="R90"/>
<pin name="3" x="7.62" y="0" visible="pad" length="short" direction="pas" rot="R180"/>
</symbol>
<symbol name="C-FILTER">
<wire x1="-2.54" y1="0" x2="2.54" y2="0" width="0.254" layer="94"/>
<wire x1="-2.54" y1="1.778" x2="2.54" y2="1.778" width="0.254" layer="94" curve="106.260205"/>
<wire x1="-2.54" y1="-1.778" x2="2.54" y2="-1.778" width="0.254" layer="94" curve="-106.260205"/>
<wire x1="0" y1="-2.54" x2="0" y2="-0.635" width="0.254" layer="94"/>
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<pin name="2@2" x="0" y="-2.54" visible="off" length="short" direction="pas" rot="R270"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="CSTCR" prefix="Q">
<description>&lt;b&gt;Resonator&lt;/b&gt;&lt;p&gt;
Source: murata.co.jp</description>
<gates>
<gate name="G$1" symbol="CST" x="0" y="0"/>
</gates>
<devices>
<device name="" package="CSTER12M">
<connects>
<connect gate="G$1" pin="1" pad="1"/>
<connect gate="G$1" pin="2" pad="2"/>
<connect gate="G$1" pin="3" pad="3"/>
</connects>
<technologies>
<technology name="6M00G53Z">
<attribute name="MF" value="" constant="no"/>
<attribute name="MPN" value="CSTCC12M0" constant="no"/>
<attribute name="OC_FARNELL" value="1170434" constant="no"/>
<attribute name="OC_NEWARK" value="25M8759" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>
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