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https://github.com/tiagovignatti/intel-gpu-tools.git
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10c6ad3805
This is to add fill operation using GPGPU pipeline which is similar to current media fill. This can be used to simply verify GPGPU pipeline and help to enable it on newer HW, currently it works on Gen7 only and will add support on later platform. Now this sets very simply thread group dispatch for one thread per thread group on SIMD16 dispatch. So the fill shader just uses thread group ID for buffer offset. v2: No new fill func typedef but adapt to igt_fillfunc_t. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
52 lines
1.6 KiB
Plaintext
52 lines
1.6 KiB
Plaintext
/*
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* Registers
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* g0 -- header
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* g1 -- constant
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* g2 -- calculate X/Y offset
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* g4-g12 payload for write message
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*/
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define(`ORIG', `g2.0<2,2,1>UD')
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define(`ORIG_X', `g2.0<1>UD')
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define(`ORIG_Y', `g2.4<1>UD')
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define(`COLOR', `g1.0')
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define(`COLORUB', `COLOR<0,1,0>UB')
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define(`COLORUD', `COLOR<0,1,0>UD')
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define(`X', `g0.4<0,1,0>UD')
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define(`Y', `g0.24<0,1,0>UD')
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mov(4) COLOR<1>UB COLORUB {align1};
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/* WRITE */
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/* count thread group ID for X/Y offset */
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mul(1) ORIG_X X 0x10UD {align1};
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mov(1) ORIG_Y Y {align1};
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mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1};
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mov(2) g4.0<1>UD ORIG {align1};
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/* Normal mode: for block height 1 row and block width 16 bytes */
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mov(1) g4.8<1>UD 0x0000000fUD {align1};
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mov(16) g5.0<1>UD COLORUD {align1 compr};
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mov(16) g7.0<1>UD COLORUD {align1 compr};
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mov(16) g9.0<1>UD COLORUD {align1 compr};
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mov(16) g11.0<1>UD COLORUD {align1 compr};
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/*
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* comment out the following instruction on Gen7
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* write(0, 0, 10, 12)
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* 10: media_block_write
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* 12: data cache data port 1
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*/
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send(16) 4 acc0<1>UW null write(0, 0, 10, 12) mlen 9 rlen 0 {align1};
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/*
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* uncomment the following instruction on Gen7
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* write(0, 0, 10, 0)
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* 10: media_block_write
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* 0: reander cache data port
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*/
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/* send(16) 4 acc0<1>UW null write(0, 0, 10, 0) mlen 9 rlen 0 {align1}; */
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/* EOT */
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mov(8) g112.0<1>UD g0.0<8,8,1>UD {align1};
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send(16) 112 null<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};
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