mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-09 08:56:11 +00:00
404 lines
11 KiB
C
404 lines
11 KiB
C
/*
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* Copyright © 2009 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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/** @file gem_exec_whisper.c
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*
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* Pass around a value to write into a scratch buffer between lots of batches
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*/
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#include "igt.h"
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#include "igt_gt.h"
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#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
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#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
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#define LOCAL_I915_EXEC_BSD_SHIFT (13)
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#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
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#define ENGINE_MASK (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
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#define VERIFY 0
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static void write_seqno(unsigned offset)
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{
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uint32_t seqno = UINT32_MAX - offset;
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FILE *file;
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file = igt_debugfs_fopen("i915_next_seqno", "w");
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igt_assert(file);
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igt_assert(fprintf(file, "0x%x", seqno) > 0);
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fclose(file);
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igt_debug("next seqno set to: 0x%x\n", seqno);
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}
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static void check_bo(int fd, uint32_t handle)
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{
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uint32_t *map;
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int i;
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igt_debug("Verifying result\n");
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map = gem_mmap__cpu(fd, handle, 0, 4096, PROT_READ);
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gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, 0);
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for (i = 0; i < 1024; i++)
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igt_assert_eq(map[i], i);
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munmap(map, 4096);
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}
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static void verify_reloc(int fd, uint32_t handle,
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const struct drm_i915_gem_relocation_entry *reloc)
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{
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if (VERIFY) {
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uint64_t target = 0;
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if (intel_gen(intel_get_drm_devid(fd)) >= 8)
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gem_read(fd, handle, reloc->offset, &target, 8);
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else
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gem_read(fd, handle, reloc->offset, &target, 4);
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igt_assert_eq_u64(target,
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reloc->presumed_offset + reloc->delta);
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}
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}
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static int __gem_context_create(int fd, uint32_t *ctx_id)
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{
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struct drm_i915_gem_context_create arg;
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int ret = 0;
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memset(&arg, 0, sizeof(arg));
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if (drmIoctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &arg))
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ret = -errno;
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*ctx_id = arg.ctx_id;
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return ret;
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}
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static bool can_mi_store_dword(int gen, unsigned engine)
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{
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return !(gen == 6 && (engine & ~(3<<13)) == I915_EXEC_BSD);
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}
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static bool ignore_engine(int gen, unsigned engine)
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{
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if (engine == 0)
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return true;
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if (!can_mi_store_dword(gen, engine))
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return true;
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return false;
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}
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#define CONTEXTS 0x1
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#define FDS 0x2
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#define INTERRUPTIBLE 0x4
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static void whisper(int fd, unsigned engine, unsigned flags)
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{
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const int gen = intel_gen(intel_get_drm_devid(fd));
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struct drm_i915_gem_exec_object2 batches[1024];
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struct drm_i915_gem_relocation_entry inter[1024];
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struct drm_i915_gem_relocation_entry reloc;
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struct drm_i915_gem_exec_object2 store, scratch;
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struct drm_i915_gem_exec_object2 tmp[2];
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struct drm_i915_gem_execbuffer2 execbuf;
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int fds[64];
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uint32_t contexts[64];
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unsigned engines[16];
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unsigned nengine;
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uint32_t batch[16];
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int i, n, pass, loc;
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unsigned int relocations = 0;
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unsigned int reloc_migrations = 0;
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unsigned int reloc_interruptions = 0;
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unsigned int eb_migrations = 0;
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uint64_t old_offset;
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nengine = 0;
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if (engine == -1) {
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for_each_engine(fd, engine) {
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if (!ignore_engine(gen, engine))
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engines[nengine++] = engine;
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}
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} else {
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igt_require(gem_has_ring(fd, engine));
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igt_require(can_mi_store_dword(gen, engine));
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engines[nengine++] = engine;
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}
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igt_require(nengine);
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memset(&scratch, 0, sizeof(scratch));
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scratch.handle = gem_create(fd, 4096);
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scratch.flags = EXEC_OBJECT_WRITE;
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memset(&store, 0, sizeof(store));
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store.handle = gem_create(fd, 4096);
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store.relocs_ptr = (uintptr_t)&reloc;
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store.relocation_count = 1;
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memset(&reloc, 0, sizeof(reloc));
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reloc.offset = sizeof(uint32_t);
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if (gen < 8 && gen >= 4)
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reloc.offset += sizeof(uint32_t);
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loc = 8;
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if (gen >= 4)
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loc += 4;
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reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
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reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
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{
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uint32_t bbe = MI_BATCH_BUFFER_END;
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tmp[0] = scratch;
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tmp[1] = store;
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gem_write(fd, store.handle, 0, &bbe, sizeof(bbe));
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memset(&execbuf, 0, sizeof(execbuf));
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execbuf.buffers_ptr = (uintptr_t)tmp;
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execbuf.buffer_count = 2;
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execbuf.flags = LOCAL_I915_EXEC_HANDLE_LUT;
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execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
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if (gen < 6)
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execbuf.flags |= I915_EXEC_SECURE;
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igt_require(__gem_execbuf(fd, &execbuf) == 0);
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scratch = tmp[0];
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store = tmp[1];
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}
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i = 0;
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batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
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if (gen >= 8) {
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batch[++i] = store.offset + loc;
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batch[++i] = (store.offset + loc) >> 32;
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} else if (gen >= 4) {
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batch[++i] = 0;
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batch[++i] = store.offset + loc;
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} else {
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batch[i]--;
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batch[++i] = store.offset + loc;
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}
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batch[++i] = 0xc0ffee;
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igt_assert(loc == sizeof(uint32_t) * i);
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batch[++i] = MI_BATCH_BUFFER_END;
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if (flags & CONTEXTS) {
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igt_require(__gem_context_create(fd, &contexts[0]) == 0);
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for (n = 1; n < 64; n++)
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contexts[n] = gem_context_create(fd);
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}
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if (flags & FDS) {
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igt_require(gen >= 6);
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for (n = 0; n < 64; n++)
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fds[n] = drm_open_driver(DRIVER_INTEL);
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}
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memset(batches, 0, sizeof(batches));
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for (n = 0; n < 1024; n++) {
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batches[n].handle = gem_create(fd, 4096);
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batches[n].offset = store.offset;
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inter[n] = reloc;
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inter[n].presumed_offset = store.offset;
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inter[n].delta = loc;
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batches[n].relocs_ptr = (uintptr_t)&inter[n];
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batches[n].relocation_count = 1;
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gem_write(fd, batches[n].handle, 0, batch, sizeof(batch));
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}
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igt_interruptible(flags & INTERRUPTIBLE) {
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for (pass = 0; pass < 1024; pass++) {
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uint64_t offset;
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write_seqno(pass);
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reloc.presumed_offset = scratch.offset;
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reloc.delta = 4*pass;
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offset = reloc.presumed_offset + reloc.delta;
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i = 0;
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if (gen >= 8) {
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batch[++i] = offset;
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batch[++i] = offset >> 32;
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} else if (gen >= 4) {
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batch[++i] = 0;
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batch[++i] = offset;
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} else {
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batch[++i] = offset;
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}
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batch[++i] = ~pass;
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gem_write(fd, store.handle, 0, batch, sizeof(batch));
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tmp[0] = scratch;
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igt_assert(tmp[0].flags & EXEC_OBJECT_WRITE);
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tmp[1] = store;
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verify_reloc(fd, store.handle, &reloc);
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execbuf.buffers_ptr = (uintptr_t)tmp;
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gem_execbuf(fd, &execbuf);
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igt_assert_eq_u64(reloc.presumed_offset, tmp[0].offset);
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scratch = tmp[0];
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gem_write(fd, batches[1023].handle, loc, &pass, sizeof(pass));
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for (n = 1024; --n >= 1; ) {
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int this_fd = fd;
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uint32_t handle[2];
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execbuf.buffers_ptr = (uintptr_t)&batches[n-1];
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reloc_migrations += batches[n-1].offset != inter[n].presumed_offset;
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batches[n-1].offset = inter[n].presumed_offset;
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old_offset = inter[n].presumed_offset;
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batches[n-1].relocation_count = 0;
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batches[n-1].flags |= EXEC_OBJECT_WRITE;
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verify_reloc(fd, batches[n].handle, &inter[n]);
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if (flags & FDS) {
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this_fd = fds[rand() % 64];
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handle[0] = batches[n-1].handle;
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handle[1] = batches[n].handle;
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batches[n-1].handle =
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gem_open(this_fd,
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gem_flink(fd, handle[0]));
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batches[n].handle =
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gem_open(this_fd,
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gem_flink(fd, handle[1]));
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}
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execbuf.flags &= ~ENGINE_MASK;
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execbuf.flags |= engines[rand() % nengine];
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if (flags & CONTEXTS)
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execbuf.rsvd1 = contexts[rand() % 64];
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gem_execbuf(this_fd, &execbuf);
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if (inter[n].presumed_offset == -1) {
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reloc_interruptions++;
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inter[n].presumed_offset = batches[n-1].offset;
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}
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igt_assert_eq_u64(inter[n].presumed_offset, batches[n-1].offset);
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relocations += inter[n].presumed_offset != old_offset;
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batches[n-1].relocation_count = 1;
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batches[n-1].flags &= ~EXEC_OBJECT_WRITE;
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if (this_fd != fd) {
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gem_close(this_fd, batches[n-1].handle);
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batches[n-1].handle = handle[0];
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gem_close(this_fd, batches[n].handle);
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batches[n].handle = handle[1];
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}
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}
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execbuf.flags &= ~ENGINE_MASK;
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execbuf.rsvd1 = 0;
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execbuf.buffers_ptr = (uintptr_t)&tmp;
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tmp[0] = tmp[1];
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tmp[0].relocation_count = 0;
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tmp[0].flags = EXEC_OBJECT_WRITE;
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reloc_migrations += tmp[0].offset != inter[0].presumed_offset;
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tmp[0].offset = inter[0].presumed_offset;
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old_offset = tmp[0].offset;
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tmp[1] = batches[0];
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verify_reloc(fd, batches[0].handle, &inter[0]);
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gem_execbuf(fd, &execbuf);
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if (inter[0].presumed_offset == -1) {
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reloc_interruptions++;
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inter[0].presumed_offset = tmp[0].offset;
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}
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igt_assert_eq_u64(inter[0].presumed_offset, tmp[0].offset);
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relocations += inter[0].presumed_offset != old_offset;
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batches[0] = tmp[1];
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tmp[1] = tmp[0];
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tmp[0] = scratch;
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igt_assert(tmp[0].flags & EXEC_OBJECT_WRITE);
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igt_assert_eq_u64(reloc.presumed_offset, tmp[0].offset);
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igt_assert(tmp[1].relocs_ptr == (uintptr_t)&reloc);
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tmp[1].relocation_count = 1;
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tmp[1].flags &= ~EXEC_OBJECT_WRITE;
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verify_reloc(fd, store.handle, &reloc);
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gem_execbuf(fd, &execbuf);
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eb_migrations += tmp[0].offset != scratch.offset;
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eb_migrations += tmp[1].offset != store.offset;
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igt_assert_eq_u64(reloc.presumed_offset, tmp[0].offset);
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store = tmp[1];
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scratch = tmp[0];
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}
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}
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igt_info("Number of migrations for execbuf: %d\n", eb_migrations);
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igt_info("Number of migrations for reloc: %d, interrupted %d, patched %d\n", reloc_migrations, reloc_interruptions, relocations);
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check_bo(fd, scratch.handle);
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gem_close(fd, scratch.handle);
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gem_close(fd, store.handle);
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if (flags & FDS) {
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for (n = 0; n < 64; n++)
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close(fds[n]);
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}
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if (flags & CONTEXTS) {
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for (n = 0; n < 64; n++)
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gem_context_destroy(fd, contexts[n]);
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}
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for (n = 0; n < 1024; n++)
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gem_close(fd, batches[n].handle);
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}
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igt_main
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{
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const struct mode {
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const char *name;
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unsigned flags;
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} modes[] = {
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{ "", 0 },
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{ "interruptible", INTERRUPTIBLE },
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{ "contexts", CONTEXTS },
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{ "contexts-interruptible", CONTEXTS | INTERRUPTIBLE},
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{ "fds", FDS },
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{ "fds-interruptible", FDS | INTERRUPTIBLE},
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{ NULL }
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};
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int fd;
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igt_fixture
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fd = drm_open_driver_master(DRIVER_INTEL);
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igt_fork_hang_detector(fd);
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for (const struct mode *m = modes; m->name; m++)
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igt_subtest_f("%s", *m->name ? m->name : "basic")
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whisper(fd, -1, m->flags);
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for (const struct intel_execution_engine *e = intel_execution_engines;
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e->name; e++) {
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for (const struct mode *m = modes; m->name; m++)
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igt_subtest_f("%s%s%s",
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e->name,
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*m->name ? "-" : "",
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m->name)
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whisper(fd, e->exec_id | e->flags, m->flags);
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}
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igt_stop_hang_detector();
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igt_fixture
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close(fd);
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}
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