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https://github.com/tiagovignatti/intel-gpu-tools.git
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4fc76adf31
In Valleyview the DPLL and lane control registers are accessible only through side band fabric called DPIO. Added two tools to read and write registers residing in this space. v2: Moved the core read/write functions to lib/intel_dpio.c based on Ben's feedback Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
43 lines
964 B
Makefile
43 lines
964 B
Makefile
bin_PROGRAMS = \
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intel_disable_clock_gating \
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intel_audio_dump \
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intel_backlight \
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intel_bios_dumper \
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intel_bios_reader \
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intel_error_decode \
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intel_gpu_top \
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intel_gpu_time \
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intel_gtt \
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intel_stepping \
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intel_reg_checker \
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intel_reg_dumper \
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intel_reg_snapshot \
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intel_reg_write \
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intel_reg_read \
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intel_forcewaked \
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intel_dpio_read \
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intel_dpio_write \
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intel_l3_parity
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noinst_PROGRAMS = \
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intel_dump_decode \
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intel_infoframes \
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intel_lid \
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intel_panel_fitter
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dist_bin_SCRIPTS = intel_gpu_abrt
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AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/lib
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AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(CWARNFLAGS) $(CAIRO_CFLAGS)
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LDADD = $(top_builddir)/lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) $(CAIRO_LIBS)
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intel_dump_decode_SOURCES = \
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intel_dump_decode.c
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intel_error_decode_SOURCES = \
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intel_error_decode.c
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intel_bios_reader_SOURCES = \
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intel_bios_reader.c \
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intel_bios.h
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