ntel-gpu-tools

mirror of https://github.com/tiagovignatti/intel-gpu-tools.git synced 2025-06-10 09:26:10 +00:00

History

Damien Lespiau e7cca1a3ca assembler: Use brw_set_src0()

Unfortunately, it's all a walk in the park. Both, internal code in the
assembler and external shaders (libva) generate registers that trigger
assertions in brw_eu_emit.c's brw_validate().

To fix all that I took the option to be able to emit warning with the -W
flag but still make the assembler generate the same opcodes.

We can fix all this, but it requires validation, something that I cannot
do right now.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

2013-03-04 15:54:40 +00:00

doc

Add autotools build system, and rearrange directory layout.

2013-03-04 15:54:23 +00:00

test

Add test case for ".declare" overriding feature.

2013-03-04 15:54:33 +00:00

.gitignore

Update .gitignore for gen4asm -> intel-gen4asm

2013-03-04 15:54:25 +00:00

brw_compat.h

assembler: Import brw_eu_emit.c

2013-03-04 15:54:37 +00:00

brw_context.c

assembler: Introduce struct brw_context

2013-03-04 15:54:37 +00:00

brw_context.h

assembler: Import brw_eu_compact.c

2013-03-04 15:54:37 +00:00

brw_defines.h

assembler: Remove trailing white space from brw_defines.h

2013-03-04 15:54:36 +00:00

brw_disasm.c

assembler: Update the disassembler code

2013-03-04 15:54:37 +00:00

brw_eu_compact.c

assembler: Import brw_eu_compact.c

2013-03-04 15:54:37 +00:00

brw_eu_emit.c

assembler: Use brw_set_src0()

2013-03-04 15:54:40 +00:00

brw_eu.c

assembler: Import brw_eu.c

2013-03-04 15:54:37 +00:00

brw_eu.h

assembler: Import brw_eu_compact.c

2013-03-04 15:54:37 +00:00

brw_reg.h

assembler: Update the disassembler code

2013-03-04 15:54:37 +00:00

brw_structs.h

assembler: Don't change the size of opcodes!

2013-03-04 15:54:38 +00:00

disasm-main.c

assembler: Make explicit that labels are part of the instructions list

2013-03-04 15:54:38 +00:00

gen4asm.h

assembler: Add the input filename to the error/warning messages

2013-03-04 15:54:40 +00:00

gram.y

assembler: Use brw_set_src0()

2013-03-04 15:54:40 +00:00

intel-gen4asm.pc.in

add intel-gen4asm.pc.in

2013-03-04 15:54:26 +00:00

lex.l

assembler: Add location support

2013-03-04 15:54:39 +00:00

main.c

assembler: Add a check for when width is 1 and hstride is not 0

2013-03-04 15:54:40 +00:00

Makefile.am

assembler: Import brw_eu_emit.c

2013-03-04 15:54:37 +00:00

ralloc.c

assembler: Import ralloc from Mesa

2013-03-04 15:54:37 +00:00

ralloc.h

assembler: Import ralloc from Mesa

2013-03-04 15:54:37 +00:00

README

More renaming of gen4asm -> intel-gen4asm, plus README update.

2013-03-04 15:54:25 +00:00

TODO

Update the TODO with more tasks and a bit more description.

2013-03-04 15:54:25 +00:00

README

intel-gen4asm is a program to compile an assembly language for the Intel 965
Express Chipset.  It has been used to construct programs for textured video in
the 2d driver.

Some examples of gen4 assembly programs are in the doc/examples directory.

Note that the language parsed by this assembler is not exactly what the final
language is going to look like.  In particular, the send instructions need to
be cleaned up and made more reasonable to program with.