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https://github.com/tiagovignatti/intel-gpu-tools.git
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d1e862324b
We tweak the tests marked as runnable in simulation to run more quickly, more often then not at the expense of stress testing (which is of an arguable interest for the initial bring up in simulation). Hopefully the values chosen still test something, which is not always straightforward. It does run quickly, the number on an IVB machines are: $ time sudo IGT_SIMULATION=0 ./piglit-run.py tests/igt.tests foo [...] real 2m0.141s user 0m16.365s sys 1m33.382s Vs. $ time sudo IGT_SIMULATION=1 ./piglit-run.py tests/igt.tests foo [...] real 0m0.448s user 0m0.226s sys 0m0.183s Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
141 lines
3.6 KiB
C
141 lines
3.6 KiB
C
/*
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* Copyright © 2011 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Daniel Vetter <daniel.vetter@ffwll.ch> (based on gem_storedw_*.c)
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*
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <assert.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/time.h>
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#include "drm.h"
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#include "i915_drm.h"
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#include "drmtest.h"
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#include "intel_bufmgr.h"
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#include "intel_batchbuffer.h"
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#include "intel_gpu_tools.h"
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#include "i830_reg.h"
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static drm_intel_bufmgr *bufmgr;
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struct intel_batchbuffer *batch;
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static drm_intel_bo *target_buffer;
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/*
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* Testcase: Basic check of ring<->ring sync using a dummy reloc
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*
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* Extremely efficient at catching missed irqs with semaphores=0 ...
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*/
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#define MI_COND_BATCH_BUFFER_END (0x36<<23 | 1)
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#define MI_DO_COMPARE (1<<21)
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static void
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store_dword_loop(int fd)
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{
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int i;
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int num_rings = gem_get_num_rings(fd);
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srandom(0xdeadbeef);
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for (i = 0; i < SLOW_QUICK(0x100000, 10); i++) {
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int ring = random() % num_rings + 1;
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if (ring == I915_EXEC_RENDER) {
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BEGIN_BATCH(4);
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OUT_BATCH(MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE);
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OUT_BATCH(0xffffffff); /* compare dword */
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OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER,
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I915_GEM_DOMAIN_RENDER, 0);
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OUT_BATCH(MI_NOOP);
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ADVANCE_BATCH();
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} else {
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BEGIN_BATCH(4);
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OUT_BATCH(MI_FLUSH_DW | 1);
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OUT_BATCH(0); /* reserved */
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OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER,
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I915_GEM_DOMAIN_RENDER, 0);
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OUT_BATCH(MI_NOOP | (1<<22) | (0xf));
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ADVANCE_BATCH();
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}
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intel_batchbuffer_flush_on_ring(batch, ring);
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}
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drm_intel_bo_map(target_buffer, 0);
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// map to force waiting on rendering
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drm_intel_bo_unmap(target_buffer);
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}
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int main(int argc, char **argv)
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{
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int fd;
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int devid;
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if (argc != 1) {
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fprintf(stderr, "usage: %s\n", argv[0]);
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exit(-1);
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}
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fd = drm_open_any();
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devid = intel_get_drm_devid(fd);
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if (!HAS_BLT_RING(devid)) {
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fprintf(stderr, "inter ring check needs gen6+\n");
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return 77;
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}
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bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
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if (!bufmgr) {
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fprintf(stderr, "failed to init libdrm\n");
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exit(-1);
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}
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drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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batch = intel_batchbuffer_alloc(bufmgr, devid);
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if (!batch) {
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fprintf(stderr, "failed to create batch buffer\n");
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exit(-1);
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}
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target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096);
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if (!target_buffer) {
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fprintf(stderr, "failed to alloc target buffer\n");
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exit(-1);
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}
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store_dword_loop(fd);
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drm_intel_bo_unreference(target_buffer);
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intel_batchbuffer_free(batch);
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drm_intel_bufmgr_destroy(bufmgr);
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close(fd);
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return 0;
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}
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