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https://github.com/tiagovignatti/intel-gpu-tools.git
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0b67c0c421
The extra parameter is for future platform. Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
34 lines
1.4 KiB
OpenEdge ABL
34 lines
1.4 KiB
OpenEdge ABL
%module chipset
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%include "stdint.i"
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%{
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#include <pciaccess.h>
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#include <stdint.h>
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#include "intel_chipset.h"
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extern int is_sandybridge(unsigned short pciid);
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extern int is_ivybridge(unsigned short pciid);
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extern int is_valleyview(unsigned short pciid);
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extern int is_haswell(unsigned short pciid);
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extern int is_broadwell(unsigned short pciid);
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extern struct pci_device *intel_get_pci_device();
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extern int intel_register_access_init(struct pci_device *pci_dev, int safe);
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extern uint32_t intel_register_read(uint32_t reg);
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extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
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extern void intel_register_access_fini();
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extern int intel_register_access_needs_fakewake();
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extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
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extern uint32_t intel_dpio_reg_read(uint32_t reg, int phy);
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%}
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extern int is_sandybridge(unsigned short pciid);
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extern int is_ivybridge(unsigned short pciid);
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extern int is_valleyview(unsigned short pciid);
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extern int is_haswell(unsigned short pciid);
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extern struct pci_device *intel_get_pci_device();
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extern int intel_register_access_init(struct pci_device *pci_dev, int safe);
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extern uint32_t intel_register_read(uint32_t reg);
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extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
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extern void intel_register_access_fini();
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extern int intel_register_access_needs_fakewake();
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extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
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extern uint32_t intel_dpio_reg_read(uint32_t reg, int phy);
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