mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-11 01:46:14 +00:00
81095305f4
This makes it a bit more like the kernel, so we can go poke at DPIO and other IOSF regs a bit more easily. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
33 lines
1.2 KiB
Makefile
33 lines
1.2 KiB
Makefile
AM_CPPFLAGS = -I$(top_srcdir)/lib $(PYTHON_CPPFLAGS) $(DRM_CFLAGS)
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BUILT_SOURCES = chipset_wrap_python.c
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dist_bin_SCRIPTS = quick_dump.py reg_access.py
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bin_SCRIPTS = chipset.py
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lib_LTLIBRARIES = I915ChipsetPython.la
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I915ChipsetPython_la_LDFLAGS = -module -avoid-version $(PYTHON_LDFLAGS) $(PCIACCESS_LIBS)
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I915ChipsetPython_la_SOURCES = chipset_wrap_python.c intel_chipset.c \
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$(top_srcdir)/lib/intel_drm.c \
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$(top_srcdir)/lib/intel_pci.c \
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$(top_srcdir)/lib/intel_reg_map.c \
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$(top_srcdir)/lib/intel_mmio.c \
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$(top_srcdir)/lib/intel_iosf.c
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chipset_wrap_python.c chipset.py: chipset.i
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$(AM_V_GEN)$(SWIG) $(AX_SWIG_PYTHON_OPT) -I/usr/include -I$(top_srcdir)/lib -o $@ $<
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all-local: I915ChipsetPython.la
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$(LN_S) -f .libs/I915ChipsetPython.so _chipset.so
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CLEANFILES = chipset_wrap_python.c chipset.py _chipset.so
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EXTRA_DIST = \
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base_display.txt base_interrupt.txt base_other.txt base_power.txt base_rings.txt \
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gen6_other.txt sandybridge \
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gen7_other.txt ivybridge \
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vlv_display.txt vlv_dpio.txt valleyview \
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gen8_interrupt.txt \
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quick_dump.py \
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reg_access.py \
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chipset.i chipset.py
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