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https://github.com/tiagovignatti/intel-gpu-tools.git
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236 lines
6.2 KiB
C
236 lines
6.2 KiB
C
#ifndef INTEL_BATCHBUFFER_H
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#define INTEL_BATCHBUFFER_H
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#include <assert.h>
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#include <stdint.h>
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#include "intel_bufmgr.h"
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#define BATCH_SZ 4096
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#define BATCH_RESERVED 16
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struct intel_batchbuffer {
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drm_intel_bufmgr *bufmgr;
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uint32_t devid;
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drm_intel_bo *bo;
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uint8_t buffer[BATCH_SZ];
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uint8_t *ptr;
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uint8_t *state;
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};
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struct intel_batchbuffer *intel_batchbuffer_alloc(drm_intel_bufmgr *bufmgr,
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uint32_t devid);
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void intel_batchbuffer_free(struct intel_batchbuffer *batch);
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void intel_batchbuffer_flush(struct intel_batchbuffer *batch);
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void intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring);
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void intel_batchbuffer_flush_with_context(struct intel_batchbuffer *batch,
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drm_intel_context *context);
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void intel_batchbuffer_reset(struct intel_batchbuffer *batch);
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void intel_batchbuffer_data(struct intel_batchbuffer *batch,
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const void *data, unsigned int bytes);
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void intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
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drm_intel_bo *buffer,
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uint32_t delta,
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uint32_t read_domains,
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uint32_t write_domain,
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int fenced);
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/* Inline functions - might actually be better off with these
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* non-inlined. Certainly better off switching all command packets to
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* be passed as structs rather than dwords, but that's a little bit of
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* work...
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*/
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#pragma GCC diagnostic ignored "-Winline"
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static inline unsigned int
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intel_batchbuffer_space(struct intel_batchbuffer *batch)
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{
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return (BATCH_SZ - BATCH_RESERVED) - (batch->ptr - batch->buffer);
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}
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static inline void
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intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, uint32_t dword)
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{
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assert(intel_batchbuffer_space(batch) >= 4);
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*(uint32_t *) (batch->ptr) = dword;
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batch->ptr += 4;
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}
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static inline void
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intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
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unsigned int sz)
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{
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assert(sz < BATCH_SZ - BATCH_RESERVED);
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if (intel_batchbuffer_space(batch) < sz)
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intel_batchbuffer_flush(batch);
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}
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/**
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* BEGIN_BATCH:
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* @n: number of DWORDS to emit
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*
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* Prepares a batch to emit @n DWORDS, flushing it if there's not enough space
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* available.
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*
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* This macro needs a pointer to an #intel_batchbuffer structure called batch in
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* scope.
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*/
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#define BEGIN_BATCH(n) do { \
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intel_batchbuffer_require_space(batch, (n)*4); \
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} while (0)
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/**
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* OUT_BATCH:
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* @d: DWORD to emit
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*
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* Emits @d into a batch.
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*
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* This macro needs a pointer to an #intel_batchbuffer structure called batch in
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* scope.
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*/
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#define OUT_BATCH(d) intel_batchbuffer_emit_dword(batch, d)
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/**
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* OUT_RELOC_FENCED:
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* @buf: relocation target libdrm buffer object
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* @read_domains: gem domain bits for the relocation
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* @write_domain: gem domain bit for the relocation
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* @delta: delta value to add to @buffer's gpu address
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*
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* Emits a fenced relocation into a batch.
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*
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* This macro needs a pointer to an #intel_batchbuffer structure called batch in
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* scope.
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*/
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#define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \
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assert((delta) >= 0); \
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intel_batchbuffer_emit_reloc(batch, buf, delta, \
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read_domains, write_domain, 1); \
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} while (0)
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/**
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* OUT_RELOC_FENCED:
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* @buf: relocation target libdrm buffer object
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* @read_domains: gem domain bits for the relocation
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* @write_domain: gem domain bit for the relocation
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* @delta: delta value to add to @buffer's gpu address
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*
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* Emits a normal, unfenced relocation into a batch.
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*
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* This macro needs a pointer to an #intel_batchbuffer structure called batch in
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* scope.
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*/
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#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
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assert((delta) >= 0); \
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intel_batchbuffer_emit_reloc(batch, buf, delta, \
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read_domains, write_domain, 0); \
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} while (0)
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/**
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* ADVANCE_BATCH:
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*
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* Completes the batch command emission sequence started with #BEGIN_BATCH.
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*
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* This macro needs a pointer to an #intel_batchbuffer structure called batch in
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* scope.
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*/
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#define ADVANCE_BATCH() do { \
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} while(0)
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#define BLIT_COPY_BATCH_START(devid, flags) do { \
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if (intel_gen(devid) >= 8) { \
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BEGIN_BATCH(10); \
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OUT_BATCH(XY_SRC_COPY_BLT_CMD | \
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XY_SRC_COPY_BLT_WRITE_ALPHA | \
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XY_SRC_COPY_BLT_WRITE_RGB | \
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(flags) | 8); \
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} else { \
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BEGIN_BATCH(8); \
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OUT_BATCH(XY_SRC_COPY_BLT_CMD | \
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XY_SRC_COPY_BLT_WRITE_ALPHA | \
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XY_SRC_COPY_BLT_WRITE_RGB | \
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(flags) | 6); \
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} \
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} while(0)
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#define COLOR_BLIT_COPY_BATCH_START(devid, flags) do { \
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if (intel_gen(devid) >= 8) { \
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BEGIN_BATCH(8); \
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OUT_BATCH(MI_NOOP); \
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OUT_BATCH(XY_COLOR_BLT_CMD_NOLEN | 0x5 | \
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COLOR_BLT_WRITE_ALPHA | \
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XY_COLOR_BLT_WRITE_RGB); \
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} else { \
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BEGIN_BATCH(6); \
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OUT_BATCH(XY_COLOR_BLT_CMD_NOLEN | 0x4 | \
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COLOR_BLT_WRITE_ALPHA | \
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XY_COLOR_BLT_WRITE_RGB); \
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} \
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} while(0)
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/**
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* BLIT_RELOC_UDW:
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* @devid: pci device id of the drm device
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*
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* Emits the upper relocation DWORD on gen8+ and nothing on earlier generations.
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*/
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#define BLIT_RELOC_UDW(devid) do { \
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if (intel_gen(devid) >= 8) { \
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OUT_BATCH(0); \
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} \
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} while(0)
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void
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intel_blt_copy(struct intel_batchbuffer *batch,
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drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch,
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drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch,
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int width, int height, int bpp);
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void intel_copy_bo(struct intel_batchbuffer *batch,
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drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
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long int size);
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struct scratch_buf {
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drm_intel_bo *bo;
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uint32_t stride;
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uint32_t tiling;
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uint32_t *data;
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uint32_t *cpu_mapping;
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uint32_t size;
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unsigned num_tiles;
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};
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static inline unsigned buf_width(struct scratch_buf *buf)
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{
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return buf->stride/sizeof(uint32_t);
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}
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static inline unsigned buf_height(struct scratch_buf *buf)
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{
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return buf->size/buf->stride;
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}
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typedef void (*render_copyfunc_t)(struct intel_batchbuffer *batch,
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drm_intel_context *context,
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struct scratch_buf *src, unsigned src_x, unsigned src_y,
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unsigned width, unsigned height,
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struct scratch_buf *dst, unsigned dst_x, unsigned dst_y);
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render_copyfunc_t get_render_copyfunc(int devid);
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typedef void (*media_fillfunc_t)(struct intel_batchbuffer *batch,
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struct scratch_buf *dst,
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unsigned x, unsigned y,
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unsigned width, unsigned height,
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uint8_t color);
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media_fillfunc_t get_media_fillfunc(int devid);
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#endif
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