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f4dfa37e85
This provides a macro that allows us to update all the arbitrary blit commands we have stuck throughout the code. It assumes we don't actually use 64b relocs (which is currently true). This also allows us to easily find all the areas we need to update later when we really use the upper dword. This block was done mostly with a sed job, and represents the easier in test blit implementations. v2 by Oscar: s/OUT_BATCH/BEGIN_BATCH in BLIT_COPY_BATCH_START CC: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
119 lines
3.4 KiB
C
119 lines
3.4 KiB
C
/*
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* Copyright © 2009 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*
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*/
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/** @file gem_tiled_blits.c
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*
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* This is a test of doing many tiled blits, with a working set
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* larger than the aperture size.
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*
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* The goal is to catch a couple types of failure;
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* - Fence management problems on pre-965.
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* - A17 or L-shaped memory tiling workaround problems in acceleration.
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*
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* The model is to fill a collection of 1MB objects in a way that can't trip
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* over A6 swizzling -- upload data to a non-tiled object, blit to the tiled
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* object. Then, copy the 1MB objects randomly between each other for a while.
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* Finally, download their data through linear objects again and see what
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* resulted.
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/time.h>
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#include "drm.h"
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#include "i915_drm.h"
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#include "drmtest.h"
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#include "intel_bufmgr.h"
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#include "intel_batchbuffer.h"
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#include "intel_gpu_tools.h"
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static drm_intel_bufmgr *bufmgr;
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struct intel_batchbuffer *batch;
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#define BAD_GTT_DEST ((256*1024*1024)) /* past end of aperture */
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static void
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bad_blit(drm_intel_bo *src_bo, uint32_t devid)
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{
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uint32_t src_pitch = 512, dst_pitch = 512;
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uint32_t cmd_bits = 0;
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if (IS_965(devid)) {
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src_pitch /= 4;
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cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
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}
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if (IS_965(devid)) {
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dst_pitch /= 4;
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cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
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}
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BLIT_COPY_BATCH_START(devid, cmd_bits);
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OUT_BATCH((3 << 24) | /* 32 bits */
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(0xcc << 16) | /* copy ROP */
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dst_pitch);
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OUT_BATCH(0); /* dst x1,y1 */
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OUT_BATCH((64 << 16) | 64); /* 64x64 blit */
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OUT_BATCH(BAD_GTT_DEST);
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BLIT_RELOC_UDW(devid);
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OUT_BATCH(0); /* src x1,y1 */
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OUT_BATCH(src_pitch);
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OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
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BLIT_RELOC_UDW(devid);
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ADVANCE_BATCH();
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intel_batchbuffer_flush(batch);
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}
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int main(int argc, char **argv)
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{
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drm_intel_bo *src;
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int fd;
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fd = drm_open_any();
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bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
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drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
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src = drm_intel_bo_alloc(bufmgr, "src", 128 * 128, 4096);
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bad_blit(src, batch->devid);
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intel_batchbuffer_free(batch);
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drm_intel_bufmgr_destroy(bufmgr);
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close(fd);
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return 0;
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}
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