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https://github.com/tiagovignatti/intel-gpu-tools.git
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Due to the way we calculate the workload by doubling it each time we might end up with almost twice as much as we want. Hence increase our fudge by 1.5 to account for that. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50666
227 lines
6.4 KiB
C
227 lines
6.4 KiB
C
/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Ben Widawsky <ben@bwidawsk.net>
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*
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*/
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#include <stdio.h>
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#include <time.h>
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#include "drm.h"
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#include "rendercopy.h"
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#define MSEC_PER_SEC 1000L
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#define USEC_PER_MSEC 1000L
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#define NSEC_PER_USEC 1000L
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#define NSEC_PER_MSEC 1000000L
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#define USEC_PER_SEC 1000000L
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#define NSEC_PER_SEC 1000000000L
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#define ENOUGH_WORK_IN_SECONDS 2
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#define BUF_SIZE (8<<20)
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#define BUF_PAGES ((8<<20)>>12)
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drm_intel_bo *dst, *dst2;
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/* returns time diff in milliseconds */
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static int64_t
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do_time_diff(struct timespec *end, struct timespec *start)
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{
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int64_t ret;
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ret = (MSEC_PER_SEC * difftime(end->tv_sec, start->tv_sec)) +
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((end->tv_nsec/NSEC_PER_MSEC) - (start->tv_nsec/NSEC_PER_MSEC));
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return ret;
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}
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/* to avoid stupid depencies on libdrm, copy&paste */
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struct local_drm_i915_gem_wait {
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/** Handle of BO we shall wait on */
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__u32 bo_handle;
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__u32 flags;
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/** Number of nanoseconds to wait, Returns time remaining. */
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__u64 timeout_ns;
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};
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# define WAIT_IOCTL DRM_IOWR(DRM_COMMAND_BASE + 0x2c, struct local_drm_i915_gem_wait)
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static int
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gem_bo_wait_timeout(int fd, uint32_t handle, uint64_t *timeout_ns)
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{
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struct local_drm_i915_gem_wait wait;
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int ret;
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assert(timeout_ns);
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wait.bo_handle = handle;
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wait.timeout_ns = *timeout_ns;
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wait.flags = 0;
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ret = drmIoctl(fd, WAIT_IOCTL, &wait);
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*timeout_ns = wait.timeout_ns;
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return ret ? -errno : 0;
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}
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static bool
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gem_bo_busy(int fd, uint32_t handle)
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{
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struct drm_i915_gem_busy busy;
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busy.handle = handle;
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_BUSY, &busy));
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return !!busy.busy;
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}
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static void blt_color_fill(struct intel_batchbuffer *batch,
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drm_intel_bo *buf,
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const unsigned int pages)
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{
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const unsigned short height = pages/4;
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const unsigned short width = 4096;
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BEGIN_BATCH(5);
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OUT_BATCH(COLOR_BLT_CMD |
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COLOR_BLT_WRITE_ALPHA |
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COLOR_BLT_WRITE_RGB);
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OUT_BATCH((3 << 24) | /* 32 Bit Color */
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0xF0 | /* Raster OP copy background register */
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0); /* Dest pitch is 0 */
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OUT_BATCH(width << 16 |
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height);
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OUT_RELOC(buf, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
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OUT_BATCH(rand()); /* random pattern */
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ADVANCE_BATCH();
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}
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int main(int argc, char **argv)
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{
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drm_intel_bufmgr *bufmgr;
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struct intel_batchbuffer *batch;
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uint64_t timeout = ENOUGH_WORK_IN_SECONDS * NSEC_PER_SEC;
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int fd, ret;
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const bool do_signals = true; /* signals will seem to make the operation
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* use less process CPU time */
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bool done = false;
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int i, iter = 1;
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fd = drm_open_any();
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bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
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drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
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dst = drm_intel_bo_alloc(bufmgr, "dst", BUF_SIZE, 4096);
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dst2 = drm_intel_bo_alloc(bufmgr, "dst2", BUF_SIZE, 4096);
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if (gem_bo_wait_timeout(fd, dst->handle, &timeout) == -EINVAL) {
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printf("kernel doesn't support wait_timeout, skipping test\n");
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return -77;
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}
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timeout = ENOUGH_WORK_IN_SECONDS * NSEC_PER_SEC;
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/* Figure out a rough number of fills required to consume 1 second of
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* GPU work.
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*/
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do {
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struct timespec start, end;
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long diff;
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assert(clock_gettime(CLOCK_MONOTONIC_RAW, &start) == 0);
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for (i = 0; i < iter; i++)
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blt_color_fill(batch, dst, BUF_PAGES);
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intel_batchbuffer_flush(batch);
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drm_intel_bo_wait_rendering(dst);
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assert(clock_gettime(CLOCK_MONOTONIC_RAW, &end) == 0);
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diff = do_time_diff(&end, &start);
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assert(diff >= 0);
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if ((diff / MSEC_PER_SEC) > ENOUGH_WORK_IN_SECONDS)
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done = true;
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else
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iter <<= 1;
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} while (!done && iter < 1000000);
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assert(iter < 1000000);
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printf("%d iters is enough work\n", iter);
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gem_quiescent_gpu(fd);
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if (do_signals)
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drmtest_fork_signal_helper();
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/* We should be able to do half as much work in the same amount of time,
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* but because we might schedule almost twice as much as required, we
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* might accidentally time out. Hence add some fudge. */
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for (i = 0; i < iter/3; i++)
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blt_color_fill(batch, dst2, BUF_PAGES);
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intel_batchbuffer_flush(batch);
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assert(gem_bo_busy(fd, dst2->handle) == true);
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ret = gem_bo_wait_timeout(fd, dst2->handle, &timeout);
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if (ret) {
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fprintf(stderr, "Timed wait failed %s\n", strerror(errno));
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exit(EXIT_FAILURE);
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}
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assert(gem_bo_busy(fd, dst2->handle) == false);
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assert(timeout != 0);
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if (timeout == (ENOUGH_WORK_IN_SECONDS * NSEC_PER_SEC))
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printf("Buffer was already done!\n");
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else {
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printf("Finished with %lu time remaining\n", timeout);
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}
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/* check that polling with timeout=0 works. */
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timeout = 0;
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assert(gem_bo_wait_timeout(fd, dst2->handle, &timeout) == 0);
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assert(timeout == 0);
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/* Now check that we correctly time out, twice the auto-tune load should
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* be good enough. */
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timeout = ENOUGH_WORK_IN_SECONDS * NSEC_PER_SEC;
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for (i = 0; i < iter*2; i++)
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blt_color_fill(batch, dst2, BUF_PAGES);
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intel_batchbuffer_flush(batch);
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ret = gem_bo_wait_timeout(fd, dst2->handle, &timeout);
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assert(ret == -ETIME);
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assert(timeout == 0);
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assert(gem_bo_busy(fd, dst2->handle) == true);
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/* check that polling with timeout=0 works. */
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timeout = 0;
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assert(gem_bo_wait_timeout(fd, dst2->handle, &timeout) == -ETIME);
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assert(timeout == 0);
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if (do_signals)
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drmtest_stop_signal_helper();
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drm_intel_bo_unreference(dst2);
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drm_intel_bo_unreference(dst);
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intel_batchbuffer_free(batch);
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drm_intel_bufmgr_destroy(bufmgr);
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close(fd);
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return 0;
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}
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