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https://github.com/tiagovignatti/intel-gpu-tools.git
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0b67c0c421
The extra parameter is for future platform. Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
60 lines
1.1 KiB
Python
Executable File
60 lines
1.1 KiB
Python
Executable File
#!/usr/bin/env python3
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import chipset
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def read(reg):
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reg = int(reg, 16)
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val = chipset.intel_register_read(reg)
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return val
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def write(reg, val):
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chipset.intel_register_write(reg, val)
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def gen6_forcewake_get():
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write(0xa18c, 0x1)
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read("0xa180")
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def mt_forcewake_get():
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write(0xa188, 0x10001)
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read("0xa180")
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def vlv_forcewake_get():
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write(0x1300b0, 0x10001)
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read("0x1300b4")
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# don't be clever, just try all possibilities
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def get_wake():
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gen6_forcewake_get()
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mt_forcewake_get()
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vlv_forcewake_get()
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def dpio_read(reg, phy):
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reg = int(reg, 16)
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phy = int(phy)
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val = chipset.intel_dpio_reg_read(reg, phy)
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return val
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def init():
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pci_dev = chipset.intel_get_pci_device()
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ret = chipset.intel_register_access_init(pci_dev, 0)
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if ret != 0:
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print("Register access init failed");
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return False
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if chipset.intel_register_access_needs_fakewake():
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print("Forcing forcewake. Don't expect your system to work after this.")
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get_wake()
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return True
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if __name__ == "__main__":
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import sys
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if init() == False:
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sys.exit()
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reg = sys.argv[1]
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print(hex(read(reg)))
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chipset.intel_register_access_fini()
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