mirror of
				https://github.com/tiagovignatti/intel-gpu-tools.git
				synced 2025-11-04 12:07:12 +00:00 
			
		
		
		
	Apply the new API to all call sites within the test suite using the following semantic patch: // Semantic patch for replacing drm_open_any* with arch-specific drm_open_driver* calls @@ identifier i =~ "\bdrm_open_any\b"; @@ - i() + drm_open_driver(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_master\b"; @@ - i() + drm_open_driver_master(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_render\b"; @@ - i() + drm_open_driver_render(DRIVER_INTEL) @@ identifier i =~ "\b__drm_open_any\b"; @@ - i() + __drm_open_driver(DRIVER_INTEL) Signed-off-by: Micah Fedke <micah.fedke@collabora.co.uk> Signed-off-by: Thomas Wood <thomas.wood@intel.com>
		
			
				
	
	
		
			244 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			244 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright © 2009 Intel Corporation
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the next
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 * paragraph) shall be included in all copies or substantial portions of the
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 * Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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 * IN THE SOFTWARE.
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 *
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 * Authors:
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 *    Eric Anholt <eric@anholt.net>
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 *
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 */
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/** @file gem_tiled_blits.c
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 *
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 * This is a test of doing many tiled blits, with a working set
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 * larger than the aperture size.
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 *
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 * The goal is to catch a couple types of failure;
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 * - Fence management problems on pre-965.
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 * - A17 or L-shaped memory tiling workaround problems in acceleration.
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 *
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 * The model is to fill a collection of 1MB objects in a way that can't trip
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 * over A6 swizzling -- upload data to a non-tiled object, blit to the tiled
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 * object.  Then, copy the 1MB objects randomly between each other for a while.
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 * Finally, download their data through linear objects again and see what
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 * resulted.
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 */
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#include "igt.h"
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/time.h>
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#include <drm.h>
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IGT_TEST_DESCRIPTION("Test doing many tiled blits, with a working set larger"
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		     " than the aperture size.");
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static drm_intel_bufmgr *bufmgr;
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struct intel_batchbuffer *batch;
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static int width = 512, height = 512;
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static drm_intel_bo *
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create_bo(uint32_t start_val)
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{
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	drm_intel_bo *bo, *linear_bo;
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	uint32_t *linear;
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	uint32_t tiling = I915_TILING_X;
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	int i;
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	bo = drm_intel_bo_alloc(bufmgr, "tiled bo", 1024 * 1024, 4096);
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	do_or_die(drm_intel_bo_set_tiling(bo, &tiling, width * 4));
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	igt_assert(tiling == I915_TILING_X);
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	linear_bo = drm_intel_bo_alloc(bufmgr, "linear src", 1024 * 1024, 4096);
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	/* Fill the BO with dwords starting at start_val */
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	do_or_die(drm_intel_bo_map(linear_bo, 1));
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	linear = linear_bo->virtual;
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	for (i = 0; i < 1024 * 1024 / 4; i++)
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		linear[i] = start_val++;
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	drm_intel_bo_unmap(linear_bo);
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	intel_copy_bo (batch, bo, linear_bo, width*height*4);
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	drm_intel_bo_unreference(linear_bo);
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	return bo;
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}
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static void
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check_bo(drm_intel_bo *bo, uint32_t start_val)
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{
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	drm_intel_bo *linear_bo;
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	uint32_t *linear;
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	int i;
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	linear_bo = drm_intel_bo_alloc(bufmgr, "linear dst", 1024 * 1024, 4096);
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	intel_copy_bo(batch, linear_bo, bo, width*height*4);
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	do_or_die(drm_intel_bo_map(linear_bo, 0));
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	linear = linear_bo->virtual;
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	for (i = 0; i < 1024 * 1024 / 4; i++) {
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		igt_assert_f(linear[i] == start_val,
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			     "Expected 0x%08x, found 0x%08x "
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			     "at offset 0x%08x\n",
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			     start_val, linear[i], i * 4);
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		start_val++;
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	}
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	drm_intel_bo_unmap(linear_bo);
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	drm_intel_bo_unreference(linear_bo);
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}
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static void run_test(int count)
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{
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	drm_intel_bo **bo;
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	uint32_t *bo_start_val;
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	uint32_t start = 0;
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	int i;
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	igt_debug("Using %d 1MiB buffers\n", count);
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	bo = malloc(sizeof(drm_intel_bo *)*count);
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	bo_start_val = malloc(sizeof(uint32_t)*count);
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	for (i = 0; i < count; i++) {
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		bo[i] = create_bo(start);
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		bo_start_val[i] = start;
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		start += 1024 * 1024 / 4;
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	}
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	igt_info("Verifying initialisation...\n");
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	for (i = 0; i < count; i++)
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		check_bo(bo[i], bo_start_val[i]);
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	igt_info("Cyclic blits, forward...\n");
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	for (i = 0; i < count * 4; i++) {
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		int src = i % count;
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		int dst = (i+1) % count;
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		if (src == dst)
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			continue;
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		intel_copy_bo(batch, bo[dst], bo[src], width*height*4);
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		bo_start_val[dst] = bo_start_val[src];
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	}
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	for (i = 0; i < count; i++)
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		check_bo(bo[i], bo_start_val[i]);
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	if (igt_run_in_simulation()) {
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		for (i = 0; i < count; i++)
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			drm_intel_bo_unreference(bo[i]);
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		free(bo_start_val);
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		free(bo);
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		return;
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	}
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	igt_info("Cyclic blits, backward...\n");
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	for (i = 0; i < count * 4; i++) {
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		int src = (i+1) % count;
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		int dst = i % count;
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		if (src == dst)
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			continue;
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		intel_copy_bo(batch, bo[dst], bo[src], width*height*4);
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		bo_start_val[dst] = bo_start_val[src];
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	}
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	for (i = 0; i < count; i++)
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		check_bo(bo[i], bo_start_val[i]);
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	igt_info("Random blits...\n");
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	for (i = 0; i < count * 4; i++) {
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		int src = random() % count;
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		int dst = random() % count;
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		if (src == dst)
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			continue;
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		intel_copy_bo(batch, bo[dst], bo[src], width*height*4);
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		bo_start_val[dst] = bo_start_val[src];
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	}
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	for (i = 0; i < count; i++) {
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		check_bo(bo[i], bo_start_val[i]);
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		drm_intel_bo_unreference(bo[i]);
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	}
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	free(bo_start_val);
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	free(bo);
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}
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int fd;
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int main(int argc, char **argv)
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{
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	igt_subtest_init(argc, argv);
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	igt_fixture {
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		fd = drm_open_driver(DRIVER_INTEL);
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		bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
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		drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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		drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 32);
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		batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
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	}
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	igt_subtest("basic")
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		run_test(2);
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	igt_subtest("normal") {
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		int count;
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		count = 3 * gem_aperture_size(fd) / (1024*1024) / 2;
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		count += (count & 1) == 0;
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		intel_require_memory(count, 1024*1024, CHECK_RAM);
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		run_test(count);
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	}
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	igt_subtest("interruptible") {
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		int count;
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		count = 3 * gem_aperture_size(fd) / (1024*1024) / 2;
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		count += (count & 1) == 0;
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		intel_require_memory(count, 1024*1024, CHECK_RAM);
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		igt_fork_signal_helper();
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		run_test(count);
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		igt_stop_signal_helper();
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	}
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	igt_fixture {
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		intel_batchbuffer_free(batch);
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		drm_intel_bufmgr_destroy(bufmgr);
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		close(fd);
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	}
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	igt_exit();
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}
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