mirror of
				https://github.com/tiagovignatti/intel-gpu-tools.git
				synced 2025-11-04 12:07:12 +00:00 
			
		
		
		
	Apply the new API to all call sites within the test suite using the following semantic patch: // Semantic patch for replacing drm_open_any* with arch-specific drm_open_driver* calls @@ identifier i =~ "\bdrm_open_any\b"; @@ - i() + drm_open_driver(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_master\b"; @@ - i() + drm_open_driver_master(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_render\b"; @@ - i() + drm_open_driver_render(DRIVER_INTEL) @@ identifier i =~ "\b__drm_open_any\b"; @@ - i() + __drm_open_driver(DRIVER_INTEL) Signed-off-by: Micah Fedke <micah.fedke@collabora.co.uk> Signed-off-by: Thomas Wood <thomas.wood@intel.com>
		
			
				
	
	
		
			187 lines
		
	
	
		
			5.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			187 lines
		
	
	
		
			5.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright © 2008 Intel Corporation
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the next
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 * paragraph) shall be included in all copies or substantial portions of the
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 * Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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 * IN THE SOFTWARE.
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 *
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 * Authors:
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 *    Eric Anholt <eric@anholt.net>
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 *
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 */
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#include "igt.h"
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#include <unistd.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/ioctl.h>
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#include "drm.h"
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#define OBJECT_SIZE 16384
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#define PAGE_SIZE 4096
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int fd;
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static void
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test_huge_bo(int huge)
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{
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	uint64_t huge_object_size, last_offset, i;
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	unsigned check = CHECK_RAM;
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	char *ptr_cpu;
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	char *cpu_pattern;
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	uint32_t bo;
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	int loop;
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	switch (huge) {
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	case -1:
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		huge_object_size = gem_mappable_aperture_size() / 2;
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		break;
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	case 0:
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		huge_object_size = gem_mappable_aperture_size() + PAGE_SIZE;
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		break;
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	case 1:
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		huge_object_size = gem_aperture_size(fd) + PAGE_SIZE;
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		break;
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	case 2:
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		huge_object_size = (intel_get_total_ram_mb() + 1) << 20;
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		check |= CHECK_SWAP;
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		break;
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	default:
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		return;
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	}
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	intel_require_memory(1, huge_object_size, check);
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	last_offset = huge_object_size - PAGE_SIZE;
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	cpu_pattern = malloc(PAGE_SIZE);
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	igt_assert(cpu_pattern);
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	for (i = 0; i < PAGE_SIZE; i++)
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		cpu_pattern[i] = i;
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	bo = gem_create(fd, huge_object_size);
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	/* Obtain CPU mapping for the object. */
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	ptr_cpu = gem_mmap__cpu(fd, bo, 0, huge_object_size,
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				PROT_READ | PROT_WRITE);
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	igt_require(ptr_cpu);
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	gem_set_domain(fd, bo, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
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	gem_close(fd, bo);
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	igt_debug("Exercising %'llu bytes\n", (long long)huge_object_size);
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	loop = 0;
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	do {
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		/* Write first page through the mapping and
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		 * assert reading it back works.
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		 */
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		memcpy(ptr_cpu, cpu_pattern, PAGE_SIZE);
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		igt_assert(memcmp(ptr_cpu, cpu_pattern, PAGE_SIZE) == 0);
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		memset(ptr_cpu, 0xcc, PAGE_SIZE);
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		/* Write last page through the mapping and
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		 * assert reading it back works.
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		 */
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		memcpy(ptr_cpu + last_offset, cpu_pattern, PAGE_SIZE);
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		igt_assert(memcmp(ptr_cpu + last_offset, cpu_pattern, PAGE_SIZE) == 0);
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		memset(ptr_cpu + last_offset, 0xcc, PAGE_SIZE);
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		/* Cross check that accessing two simultaneous pages works. */
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		igt_assert(memcmp(ptr_cpu, ptr_cpu + last_offset, PAGE_SIZE) == 0);
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		/* Force every page to be faulted and retest */
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		for (i = 0; i < huge_object_size; i += 4096)
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			ptr_cpu[i] = i >> 12;
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	} while (loop++ == 0);
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	munmap(ptr_cpu, huge_object_size);
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	free(cpu_pattern);
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}
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igt_main
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{
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	struct drm_i915_gem_mmap arg;
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	uint8_t expected[OBJECT_SIZE];
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	uint8_t buf[OBJECT_SIZE];
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	uint8_t *addr;
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	int ret;
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	igt_fixture
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		fd = drm_open_driver(DRIVER_INTEL);
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	igt_subtest("bad-object") {
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		memset(&arg, 0, sizeof(arg));
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		arg.handle = 0x10101010;
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		arg.offset = 0;
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		arg.size = 4096;
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		ret = ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg);
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		igt_assert(ret == -1 && errno == ENOENT);
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	}
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	igt_subtest("basic") {
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		arg.handle = gem_create(fd, OBJECT_SIZE);
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		arg.offset = 0;
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		arg.size = OBJECT_SIZE;
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		ret = ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg);
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		igt_assert(ret == 0);
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		addr = (uint8_t *)(uintptr_t)arg.addr_ptr;
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		igt_info("Testing contents of newly created object.\n");
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		memset(expected, 0, sizeof(expected));
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		igt_assert(memcmp(addr, expected, sizeof(expected)) == 0);
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		igt_info("Testing coherency of writes and mmap reads.\n");
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		memset(buf, 0, sizeof(buf));
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		memset(buf + 1024, 0x01, 1024);
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		memset(expected + 1024, 0x01, 1024);
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		gem_write(fd, arg.handle, 0, buf, OBJECT_SIZE);
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		igt_assert(memcmp(buf, addr, sizeof(buf)) == 0);
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		igt_info("Testing that mapping stays after close\n");
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		gem_close(fd, arg.handle);
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		igt_assert(memcmp(buf, addr, sizeof(buf)) == 0);
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		igt_info("Testing unmapping\n");
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		munmap(addr, OBJECT_SIZE);
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	}
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	igt_subtest("short-mmap") {
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		igt_assert(OBJECT_SIZE > 4096);
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		arg.handle = gem_create(fd, OBJECT_SIZE);
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		addr = gem_mmap__cpu(fd, arg.handle, 0, 4096, PROT_WRITE);
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		memset(addr, 0, 4096);
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		munmap(addr, 4096);
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		gem_close(fd, arg.handle);
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	}
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	igt_subtest("basic-small-bo")
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		test_huge_bo(-1);
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	igt_subtest("big-bo")
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		test_huge_bo(0);
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	igt_subtest("huge-bo")
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		test_huge_bo(1);
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	igt_subtest("swap-bo")
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		test_huge_bo(2);
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	igt_fixture
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		close(fd);
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}
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