mirror of
				https://github.com/tiagovignatti/intel-gpu-tools.git
				synced 2025-11-04 12:07:12 +00:00 
			
		
		
		
	Apply the new API to all call sites within the test suite using the following semantic patch: // Semantic patch for replacing drm_open_any* with arch-specific drm_open_driver* calls @@ identifier i =~ "\bdrm_open_any\b"; @@ - i() + drm_open_driver(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_master\b"; @@ - i() + drm_open_driver_master(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_render\b"; @@ - i() + drm_open_driver_render(DRIVER_INTEL) @@ identifier i =~ "\b__drm_open_any\b"; @@ - i() + __drm_open_driver(DRIVER_INTEL) Signed-off-by: Micah Fedke <micah.fedke@collabora.co.uk> Signed-off-by: Thomas Wood <thomas.wood@intel.com>
		
			
				
	
	
		
			253 lines
		
	
	
		
			6.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			253 lines
		
	
	
		
			6.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright © 2009 Intel Corporation
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the next
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 * paragraph) shall be included in all copies or substantial portions of the
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 * Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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 * IN THE SOFTWARE.
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 *
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 * Authors:
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 *    Eric Anholt <eric@anholt.net>
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 *
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 */
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/** @file gem_linear_blits.c
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 *
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 * This is a test of doing many blits, with a working set
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 * larger than the aperture size.
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 *
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 * The goal is to simply ensure the basics work.
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 */
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#include "igt.h"
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/time.h>
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#include <drm.h>
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IGT_TEST_DESCRIPTION("Test doing many blits with a working set larger than the"
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		     " aperture size.");
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#define WIDTH 512
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#define HEIGHT 512
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static uint32_t linear[WIDTH*HEIGHT];
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static void
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copy(int fd, uint32_t dst, uint32_t src)
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{
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	uint32_t batch[12];
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	struct drm_i915_gem_relocation_entry reloc[2];
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	struct drm_i915_gem_exec_object2 obj[3];
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	struct drm_i915_gem_execbuffer2 exec;
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	int i = 0;
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	batch[i++] = XY_SRC_COPY_BLT_CMD |
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		  XY_SRC_COPY_BLT_WRITE_ALPHA |
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		  XY_SRC_COPY_BLT_WRITE_RGB;
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	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
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		batch[i - 1] |= 8;
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	else
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		batch[i - 1] |= 6;
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	batch[i++] = (3 << 24) | /* 32 bits */
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		  (0xcc << 16) | /* copy ROP */
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		  WIDTH*4;
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	batch[i++] = 0; /* dst x1,y1 */
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	batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
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	batch[i++] = 0; /* dst reloc */
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	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
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		batch[i++] = 0;
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	batch[i++] = 0; /* src x1,y1 */
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	batch[i++] = WIDTH*4;
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	batch[i++] = 0; /* src reloc */
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	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
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		batch[i++] = 0;
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	batch[i++] = MI_BATCH_BUFFER_END;
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	batch[i++] = MI_NOOP;
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	memset(reloc, 0, sizeof(reloc));
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	reloc[0].target_handle = dst;
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	reloc[0].delta = 0;
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	reloc[0].offset = 4 * sizeof(batch[0]);
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	reloc[0].presumed_offset = 0;
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	reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
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	reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
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	reloc[1].target_handle = src;
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	reloc[1].delta = 0;
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	reloc[1].offset = 7 * sizeof(batch[0]);
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	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
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		reloc[1].offset += sizeof(batch[0]);
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	reloc[1].presumed_offset = 0;
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	reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
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	reloc[1].write_domain = 0;
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	memset(obj, 0, sizeof(obj));
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	obj[0].handle = dst;
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	obj[1].handle = src;
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	obj[2].handle = gem_create(fd, 4096);
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	gem_write(fd, obj[2].handle, 0, batch, i * sizeof(batch[0]));
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	obj[2].relocation_count = 2;
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	obj[2].relocs_ptr = (uintptr_t)reloc;
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	memset(&exec, 0, sizeof(exec));
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	exec.buffers_ptr = (uintptr_t)obj;
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	exec.buffer_count = 3;
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	exec.batch_len = i * sizeof(batch[0]);
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	exec.flags = gem_has_blt(fd) ? I915_EXEC_BLT : 0;
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	gem_execbuf(fd, &exec);
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	gem_close(fd, obj[2].handle);
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}
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static uint32_t
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create_bo(int fd, uint32_t val)
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{
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	uint32_t handle;
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	int i;
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	handle = gem_create(fd, sizeof(linear));
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	/* Fill the BO with dwords starting at val */
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	for (i = 0; i < WIDTH*HEIGHT; i++)
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		linear[i] = val++;
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	gem_write(fd, handle, 0, linear, sizeof(linear));
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	return handle;
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}
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static void
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check_bo(int fd, uint32_t handle, uint32_t val)
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{
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	int i;
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	gem_read(fd, handle, 0, linear, sizeof(linear));
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	for (i = 0; i < WIDTH*HEIGHT; i++) {
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		igt_assert_f(linear[i] == val,
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			     "Expected 0x%08x, found 0x%08x "
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			     "at offset 0x%08x\n",
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			     val, linear[i], i * 4);
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		val++;
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	}
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}
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static void run_test(int fd, int count)
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{
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	uint32_t *handle, *start_val;
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	uint32_t start = 0;
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	int i;
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	igt_debug("Using %d 1MiB buffers\n", count);
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	handle = malloc(sizeof(uint32_t)*count*2);
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	start_val = handle + count;
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	for (i = 0; i < count; i++) {
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		handle[i] = create_bo(fd, start);
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		start_val[i] = start;
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		start += 1024 * 1024 / 4;
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	}
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	igt_debug("Verifying initialisation...\n");
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	for (i = 0; i < count; i++)
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		check_bo(fd, handle[i], start_val[i]);
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	igt_debug("Cyclic blits, forward...\n");
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	for (i = 0; i < count * 4; i++) {
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		int src = i % count;
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		int dst = (i + 1) % count;
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		copy(fd, handle[dst], handle[src]);
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		start_val[dst] = start_val[src];
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	}
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	for (i = 0; i < count; i++)
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		check_bo(fd, handle[i], start_val[i]);
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	igt_debug("Cyclic blits, backward...\n");
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	for (i = 0; i < count * 4; i++) {
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		int src = (i + 1) % count;
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		int dst = i % count;
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		copy(fd, handle[dst], handle[src]);
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		start_val[dst] = start_val[src];
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	}
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	for (i = 0; i < count; i++)
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		check_bo(fd, handle[i], start_val[i]);
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	igt_debug("Random blits...\n");
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	for (i = 0; i < count * 4; i++) {
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		int src = random() % count;
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		int dst = random() % count;
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		if (src == dst)
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			continue;
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		copy(fd, handle[dst], handle[src]);
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		start_val[dst] = start_val[src];
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	}
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	for (i = 0; i < count; i++) {
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		check_bo(fd, handle[i], start_val[i]);
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		gem_close(fd, handle[i]);
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	}
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	free(handle);
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}
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int main(int argc, char **argv)
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{
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	int fd = 0;
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	igt_subtest_init(argc, argv);
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	igt_fixture {
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		fd = drm_open_driver(DRIVER_INTEL);
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	}
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	igt_subtest("basic")
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		run_test(fd, 2);
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	igt_subtest("normal") {
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		int count;
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		count = 3 * gem_aperture_size(fd) / (1024*1024) / 2;
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		igt_require(count > 1);
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		intel_require_memory(count, sizeof(linear), CHECK_RAM);
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		run_test(fd, count);
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	}
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	igt_subtest("interruptible") {
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		int count;
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		count = 3 * gem_aperture_size(fd) / (1024*1024) / 2;
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		igt_require(count > 1);
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		intel_require_memory(count, sizeof(linear), CHECK_RAM);
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		igt_fork_signal_helper();
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		run_test(fd, count);
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		igt_stop_signal_helper();
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	}
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	igt_exit();
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}
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