mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-11-04 12:07:12 +00:00
c81d293aed
Apply the new API to all call sites within the test suite using the following semantic patch: // Semantic patch for replacing drm_open_any* with arch-specific drm_open_driver* calls @@ identifier i =~ "\bdrm_open_any\b"; @@ - i() + drm_open_driver(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_master\b"; @@ - i() + drm_open_driver_master(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_render\b"; @@ - i() + drm_open_driver_render(DRIVER_INTEL) @@ identifier i =~ "\b__drm_open_any\b"; @@ - i() + __drm_open_driver(DRIVER_INTEL) Signed-off-by: Micah Fedke <micah.fedke@collabora.co.uk> Signed-off-by: Thomas Wood <thomas.wood@intel.com>
123 lines
3.4 KiB
C
123 lines
3.4 KiB
C
/*
|
|
* Copyright © 2011 Intel Corporation
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice (including the next
|
|
* paragraph) shall be included in all copies or substantial portions of the
|
|
* Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
|
* IN THE SOFTWARE.
|
|
*
|
|
* Authors:
|
|
* Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
*
|
|
*/
|
|
|
|
#include "igt.h"
|
|
#include <stdlib.h>
|
|
#include <stdio.h>
|
|
#include <string.h>
|
|
#include <fcntl.h>
|
|
#include <inttypes.h>
|
|
#include <errno.h>
|
|
#include <sys/stat.h>
|
|
#include <sys/time.h>
|
|
#include "drm.h"
|
|
#include "intel_bufmgr.h"
|
|
|
|
IGT_TEST_DESCRIPTION("Provoke the hangcheck timer on an otherwise idle"
|
|
" system.");
|
|
|
|
/*
|
|
* Testcase: Provoke the hangcheck timer on an otherwise idle system
|
|
*
|
|
* This tries to hit forcewake locking bugs when the hangcheck runs. Somehow we
|
|
* often luck out and the hangcheck runs while someone else is already holding
|
|
* the dev->struct_mutex.
|
|
*
|
|
* It's imperative that nothing else runs while this test runs, i.e. kill your X
|
|
* session, please.
|
|
*/
|
|
|
|
static drm_intel_bufmgr *bufmgr;
|
|
struct intel_batchbuffer *batch;
|
|
|
|
uint32_t blob[2048*2048];
|
|
|
|
#define MAX_BLT_SIZE 128
|
|
igt_simple_main
|
|
{
|
|
drm_intel_bo *bo = NULL;
|
|
uint32_t tiling_mode = I915_TILING_X;
|
|
unsigned long pitch, act_size;
|
|
int fd, i, devid;
|
|
|
|
igt_skip_on_simulation();
|
|
|
|
memset(blob, 'A', sizeof(blob));
|
|
|
|
fd = drm_open_driver(DRIVER_INTEL);
|
|
|
|
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
|
|
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
|
|
devid = intel_get_drm_devid(fd);
|
|
batch = intel_batchbuffer_alloc(bufmgr, devid);
|
|
|
|
act_size = 2048;
|
|
igt_info("filling ring\n");
|
|
drm_intel_bo_unreference(bo);
|
|
bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled bo", act_size, act_size,
|
|
4, &tiling_mode, &pitch, 0);
|
|
|
|
drm_intel_bo_subdata(bo, 0, act_size*act_size*4, blob);
|
|
|
|
if (IS_965(devid))
|
|
pitch /= 4;
|
|
|
|
for (i = 0; i < 10000; i++) {
|
|
BLIT_COPY_BATCH_START(XY_SRC_COPY_BLT_SRC_TILED |
|
|
XY_SRC_COPY_BLT_DST_TILED);
|
|
OUT_BATCH((3 << 24) | /* 32 bits */
|
|
(0xcc << 16) | /* copy ROP */
|
|
pitch);
|
|
OUT_BATCH(0 << 16 | 1024);
|
|
OUT_BATCH((2048) << 16 | (2048));
|
|
OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
|
|
OUT_BATCH(0 << 16 | 0);
|
|
OUT_BATCH(pitch);
|
|
OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, 0, 0);
|
|
ADVANCE_BATCH();
|
|
|
|
if (batch->gen >= 6) {
|
|
BEGIN_BATCH(3, 0);
|
|
OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
|
|
OUT_BATCH(0);
|
|
OUT_BATCH(0);
|
|
ADVANCE_BATCH();
|
|
}
|
|
}
|
|
|
|
igt_info("waiting\n");
|
|
sleep(10);
|
|
|
|
igt_info("done waiting, check dmesg\n");
|
|
drm_intel_bo_unreference(bo);
|
|
|
|
intel_batchbuffer_free(batch);
|
|
drm_intel_bufmgr_destroy(bufmgr);
|
|
|
|
close(fd);
|
|
}
|