mirror of
				https://github.com/tiagovignatti/intel-gpu-tools.git
				synced 2025-11-04 12:07:12 +00:00 
			
		
		
		
	Apply the new API to all call sites within the test suite using the following semantic patch: // Semantic patch for replacing drm_open_any* with arch-specific drm_open_driver* calls @@ identifier i =~ "\bdrm_open_any\b"; @@ - i() + drm_open_driver(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_master\b"; @@ - i() + drm_open_driver_master(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_render\b"; @@ - i() + drm_open_driver_render(DRIVER_INTEL) @@ identifier i =~ "\b__drm_open_any\b"; @@ - i() + __drm_open_driver(DRIVER_INTEL) Signed-off-by: Micah Fedke <micah.fedke@collabora.co.uk> Signed-off-by: Thomas Wood <thomas.wood@intel.com>
		
			
				
	
	
		
			242 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			242 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright © 2011,2012 Intel Corporation
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the next
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 * paragraph) shall be included in all copies or substantial portions of the
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 * Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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 * IN THE SOFTWARE.
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 *
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 * Authors:
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 *    Chris Wilson <chris@chris-wilson.co.uk>
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 *    Daniel Vetter <daniel.vetter@ffwll.ch>
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 *
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 */
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/*
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 * Testcase: run a couple of big batches to force the unbind on misalignment code.
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 */
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#include "igt.h"
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#include <unistd.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/ioctl.h>
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#include <sys/time.h>
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#include <drm.h>
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IGT_TEST_DESCRIPTION("Run a couple of big batches to force the unbind on"
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		     " misalignment code.");
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#define HEIGHT 256
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#define WIDTH 1024
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static void
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copy(int fd, uint32_t dst, uint32_t src, uint32_t *all_bo, int n_bo, int alignment, int error)
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{
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	uint32_t batch[12];
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	struct drm_i915_gem_relocation_entry reloc[2];
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	struct drm_i915_gem_exec_object2 *obj;
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	struct drm_i915_gem_execbuffer2 exec;
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	uint32_t handle;
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	int n, ret, i=0;
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	batch[i++] = (XY_SRC_COPY_BLT_CMD |
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		    XY_SRC_COPY_BLT_WRITE_ALPHA |
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		    XY_SRC_COPY_BLT_WRITE_RGB | 6);
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	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
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		batch[i - 1] += 2;
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	batch[i++] = (3 << 24) | /* 32 bits */
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		  (0xcc << 16) | /* copy ROP */
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		  WIDTH*4;
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	batch[i++] = 0; /* dst x1,y1 */
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	batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
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	batch[i++] = 0; /* dst reloc */
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	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
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		batch[i++] = 0; /* FIXME */
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	batch[i++] = 0; /* src x1,y1 */
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	batch[i++] = WIDTH*4;
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	batch[i++] = 0; /* src reloc */
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	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
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		batch[i++] = 0; /* FIXME */
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	batch[i++] = MI_BATCH_BUFFER_END;
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	batch[i++] = MI_NOOP;
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	handle = gem_create(fd, 4096);
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	gem_write(fd, handle, 0, batch, sizeof(batch));
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	reloc[0].target_handle = dst;
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	reloc[0].delta = 0;
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	reloc[0].offset = 4 * sizeof(batch[0]);
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	reloc[0].presumed_offset = 0;
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	reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
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	reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
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	reloc[1].target_handle = src;
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	reloc[1].delta = 0;
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	reloc[1].offset = 7 * sizeof(batch[0]);
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	reloc[1].presumed_offset = 0;
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	reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
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	reloc[1].write_domain = 0;
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	obj = calloc(n_bo + 1, sizeof(*obj));
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	for (n = 0; n < n_bo; n++) {
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		obj[n].handle = all_bo[n];
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		obj[n].alignment = alignment;
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	}
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	obj[n].handle = handle;
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	obj[n].relocation_count = 2;
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	obj[n].relocs_ptr = (uintptr_t)reloc;
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	exec.buffers_ptr = (uintptr_t)obj;
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	exec.buffer_count = n_bo + 1;
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	exec.batch_start_offset = 0;
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	exec.batch_len = i * 4;
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	exec.DR1 = exec.DR4 = 0;
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	exec.num_cliprects = 0;
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	exec.cliprects_ptr = 0;
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	exec.flags = HAS_BLT_RING(intel_get_drm_devid(fd)) ? I915_EXEC_BLT : 0;
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	i915_execbuffer2_set_context_id(exec, 0);
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	exec.rsvd2 = 0;
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	ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
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	if (ret)
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		ret = errno;
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	igt_assert_eq(ret, error);
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	gem_close(fd, handle);
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	free(obj);
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}
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static void minor_evictions(int fd, int size, int count)
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{
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	uint32_t *bo, *sel;
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	int n, m, alignment, pass, fail;
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	intel_require_memory(2 * count, size, CHECK_RAM);
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	bo = malloc(3*count*sizeof(*bo));
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	igt_assert(bo);
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	for (n = 0; n < 2*count; n++)
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		bo[n] = gem_create(fd, size);
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	sel = bo + n;
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	for (alignment = m = 4096; alignment <= size; alignment <<= 1) {
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		for (fail = 0; fail < 10; fail++) {
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			for (pass = 0; pass < 100; pass++) {
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				for (n = 0; n < count; n++, m += 7)
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					sel[n] = bo[m%(2*count)];
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				copy(fd, sel[0], sel[1], sel, count, alignment, 0);
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			}
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			copy(fd, bo[0], bo[0], bo, 2*count, alignment, ENOSPC);
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		}
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	}
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	for (n = 0; n < 2*count; n++)
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		gem_close(fd, bo[n]);
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	free(bo);
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}
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static void major_evictions(int fd, int size, int count)
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{
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	int n, m, loop, alignment, max;
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	uint32_t *bo;
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	intel_require_memory(count, size, CHECK_RAM);
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	bo = malloc(count*sizeof(*bo));
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	igt_assert(bo);
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	for (n = 0; n < count; n++)
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		bo[n] = gem_create(fd, size);
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	max = gem_aperture_size(fd) - size;
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	for (alignment = m = 4096; alignment < max; alignment <<= 1) {
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		for (loop = 0; loop < 100; loop++, m += 17) {
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			n = m % count;
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			copy(fd, bo[n], bo[n], &bo[n], 1, alignment, 0);
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		}
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	}
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	for (n = 0; n < count; n++)
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		gem_close(fd, bo[n]);
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	free(bo);
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}
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int fd;
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igt_main
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{
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	int size, count;
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	igt_fixture {
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		fd = drm_open_driver(DRIVER_INTEL);
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	}
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	igt_subtest("minor-normal") {
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		size = 1024 * 1024;
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		count = 3*gem_aperture_size(fd) / size / 4;
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		minor_evictions(fd, size, count);
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	}
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	igt_subtest("major-normal") {
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		size = 3*gem_aperture_size(fd) / 4;
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		count = 4;
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		major_evictions(fd, size, count);
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	}
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	igt_fork_signal_helper();
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	igt_subtest("minor-interruptible") {
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		size = 1024 * 1024;
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		count = 3*gem_aperture_size(fd) / size / 4;
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		minor_evictions(fd, size, count);
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	}
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	igt_subtest("major-interruptible") {
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		size = 3*gem_aperture_size(fd) / 4;
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		count = 4;
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		major_evictions(fd, size, count);
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	}
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	if (igt_fork_hang_helper()) {
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		igt_subtest("minor-hang") {
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			size = 1024 * 1024;
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			count = 3*gem_aperture_size(fd) / size / 4;
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			minor_evictions(fd, size, count);
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		}
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		igt_subtest("major-hang") {
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			size = 3*gem_aperture_size(fd) / 4;
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			count = 4;
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			major_evictions(fd, size, count);
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		}
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		igt_stop_hang_helper();
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	}
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	igt_stop_signal_helper();
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	igt_fixture
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		close(fd);
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}
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