mirror of
				https://github.com/tiagovignatti/intel-gpu-tools.git
				synced 2025-11-04 12:07:12 +00:00 
			
		
		
		
	Apply the new API to all call sites within the test suite using the following semantic patch: // Semantic patch for replacing drm_open_any* with arch-specific drm_open_driver* calls @@ identifier i =~ "\bdrm_open_any\b"; @@ - i() + drm_open_driver(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_master\b"; @@ - i() + drm_open_driver_master(DRIVER_INTEL) @@ identifier i =~ "\bdrm_open_any_render\b"; @@ - i() + drm_open_driver_render(DRIVER_INTEL) @@ identifier i =~ "\b__drm_open_any\b"; @@ - i() + __drm_open_driver(DRIVER_INTEL) Signed-off-by: Micah Fedke <micah.fedke@collabora.co.uk> Signed-off-by: Thomas Wood <thomas.wood@intel.com>
		
			
				
	
	
		
			180 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			180 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright © 2011,2012 Intel Corporation
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the next
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 * paragraph) shall be included in all copies or substantial portions of the
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 * Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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 * IN THE SOFTWARE.
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 *
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 * Authors:
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 *    Chris Wilson <chris@chris-wilson.co.uk>
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 *    Daniel Vetter <daniel.vetter@ffwll.ch>
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 *
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 */
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/*
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 * Testcase: Check whether we correctly invalidate the cs tlb
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 *
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 * Motivated by a strange bug on launchpad where *acth != ipehr, on snb notably
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 * where everything should be coherent by default.
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 *
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 * https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1063252
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 */
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#include "igt.h"
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#include <unistd.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/ioctl.h>
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#include <sys/time.h>
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#include <drm.h>
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IGT_TEST_DESCRIPTION("Check whether we correctly invalidate the cs tlb.");
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#define LOCAL_I915_EXEC_VEBOX (4<<0)
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#define BATCH_SIZE (1024*1024)
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static int exec(int fd, uint32_t handle, int split,
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		uint64_t *gtt_ofs, unsigned ring_id)
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{
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	struct drm_i915_gem_execbuffer2 execbuf;
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	struct drm_i915_gem_exec_object2 gem_exec[1];
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	int ret = 0;
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	gem_exec[0].handle = handle;
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	gem_exec[0].relocation_count = 0;
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	gem_exec[0].relocs_ptr = 0;
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	gem_exec[0].alignment = 0;
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	gem_exec[0].offset = 0x00100000;
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	gem_exec[0].flags = 0;
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	gem_exec[0].rsvd1 = 0;
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	gem_exec[0].rsvd2 = 0;
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	execbuf.buffers_ptr = (uintptr_t)gem_exec;
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	execbuf.buffer_count = 1;
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	execbuf.batch_start_offset = 0;
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	execbuf.batch_len = 8*(split+1);
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	execbuf.cliprects_ptr = 0;
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	execbuf.num_cliprects = 0;
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	execbuf.DR1 = 0;
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	execbuf.DR4 = 0;
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	execbuf.flags = ring_id;
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	i915_execbuffer2_set_context_id(execbuf, 0);
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	execbuf.rsvd2 = 0;
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	ret = drmIoctl(fd,
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		       DRM_IOCTL_I915_GEM_EXECBUFFER2,
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		       &execbuf);
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	*gtt_ofs = gem_exec[0].offset;
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	return ret;
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}
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static void run_on_ring(int fd, unsigned ring_id, const char *ring_name)
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{
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	uint32_t handle, handle_new;
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	uint64_t gtt_offset, gtt_offset_new;
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	uint32_t *batch_ptr, *batch_ptr_old;
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	unsigned split;
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	char buf[100];
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	int i;
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	gem_require_ring(fd, ring_id);
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	sprintf(buf, "testing %s cs tlb coherency: ", ring_name);
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	/* Shut up gcc, too stupid. */
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	batch_ptr_old = NULL;
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	handle = 0;
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	gtt_offset = 0;
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	for (split = 0; split < BATCH_SIZE/8 - 1; split += 2) {
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		igt_progress(buf, split, BATCH_SIZE/8 - 1);
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		handle_new = gem_create(fd, BATCH_SIZE);
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		batch_ptr = gem_mmap__cpu(fd, handle_new, 0, BATCH_SIZE,
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					  PROT_READ | PROT_WRITE);
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		batch_ptr[split*2] = MI_BATCH_BUFFER_END;
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		for (i = split*2 + 2; i < BATCH_SIZE/8; i++)
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			batch_ptr[i] = 0xffffffff;
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		if (split > 0) {
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			gem_sync(fd, handle);
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			gem_close(fd, handle);
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		}
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		igt_assert_eq(exec(fd, handle_new, split, >t_offset_new, ring_id),
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			      0);
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		if (split > 0) {
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			/* Check that we've managed to collide in the tlb. */
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			igt_assert(gtt_offset == gtt_offset_new);
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			/* We hang onto the storage of the old batch by keeping
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			 * the cpu mmap around. */
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			munmap(batch_ptr_old, BATCH_SIZE);
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		}
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		handle = handle_new;
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		gtt_offset = gtt_offset_new;
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		batch_ptr_old = batch_ptr;
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	}
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}
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int fd;
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igt_main
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{
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	igt_skip_on_simulation();
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	igt_fixture {
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		fd = drm_open_driver(DRIVER_INTEL);
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		/* This test is very sensitive to residual gtt_mm noise from previous
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		 * tests. Try to quiet thing down first. */
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		gem_quiescent_gpu(fd);
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		sleep(5); /* needs more serious ducttape */
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	}
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	igt_subtest("render")
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		run_on_ring(fd, I915_EXEC_RENDER, "render");
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	igt_subtest("bsd")
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		run_on_ring(fd, I915_EXEC_BSD, "bsd");
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	igt_subtest("blt")
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		run_on_ring(fd, I915_EXEC_BLT, "blt");
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	igt_subtest("vebox")
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		run_on_ring(fd, LOCAL_I915_EXEC_VEBOX, "vebox");
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	igt_fixture
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		close(fd);
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}
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