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https://github.com/tiagovignatti/intel-gpu-tools.git
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be7ca950d7
This allows to specify '-d' parameter which will decode individual bits in each register being read. The register bits are printed horizontally for space reasons. This requires more than 80x25 terminal to see them all. An alternative solution would be to print them vertically, but this will become much more difficult to read when printing multiple registers at the same time. v2: fix spacing to get us a bit closer to the code nirvana. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
132 lines
3.7 KiB
C
132 lines
3.7 KiB
C
/*
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* Copyright © 2010 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Zhenyu Wang <zhenyuw@linux.intel.com>
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*
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*/
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#include <unistd.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <err.h>
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#include <string.h>
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#include "intel_gpu_tools.h"
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static void bit_decode(uint32_t reg)
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{
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int i;
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for (i=31; i >= 0; i--)
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printf(" %2d", i);
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printf("\n");
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for (i=31; i >= 0; i--)
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printf(" %2d", (reg & (1 << i)) && 1);
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printf("\n");
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}
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static void dump_range(uint32_t start, uint32_t end)
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{
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int i;
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for (i = start; i < end; i += 4)
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printf("0x%X : 0x%X\n", i,
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*(volatile uint32_t *)((volatile char*)mmio + i));
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}
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static void usage(char *cmdname)
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{
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printf("Usage: %s [-f|-d] [addr1] [addr2] .. [addrN]\n", cmdname);
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printf("\t -f : read back full range of registers.\n");
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printf("\t WARNING! This option may result in a machine hang!\n");
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printf("\t -d : decode register bits.\n");
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printf("\t addr : in 0xXXXX format\n");
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}
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int main(int argc, char** argv)
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{
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int ret = 0;
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uint32_t reg;
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int i, ch;
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char *cmdname = strdup(argv[0]);
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int full_dump = 0;
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int decode_bits = 0;
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while ((ch = getopt(argc, argv, "dfh")) != -1) {
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switch(ch) {
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case 'd':
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decode_bits = 1;
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break;
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case 'f':
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full_dump = 1;
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break;
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case 'h':
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usage(cmdname);
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ret = 1;
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goto out;
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}
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}
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argc -= optind;
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argv += optind;
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if (argc < 1) {
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usage(cmdname);
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ret = 1;
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goto out;
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}
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intel_register_access_init(intel_get_pci_device(), 0);
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if (full_dump) {
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dump_range(0x00000, 0x00fff); /* VGA registers */
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dump_range(0x02000, 0x02fff); /* instruction, memory, interrupt control registers */
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dump_range(0x03000, 0x031ff); /* FENCE and PPGTT control registers */
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dump_range(0x03200, 0x03fff); /* frame buffer compression registers */
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dump_range(0x05000, 0x05fff); /* I/O control registers */
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dump_range(0x06000, 0x06fff); /* clock control registers */
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dump_range(0x07000, 0x07fff); /* 3D internal debug registers */
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dump_range(0x07400, 0x088ff); /* GPE debug registers */
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dump_range(0x0a000, 0x0afff); /* display palette registers */
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dump_range(0x10000, 0x13fff); /* MMIO MCHBAR */
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dump_range(0x30000, 0x3ffff); /* overlay registers */
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dump_range(0x60000, 0x6ffff); /* display engine pipeline registers */
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dump_range(0x70000, 0x72fff); /* display and cursor registers */
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dump_range(0x73000, 0x73fff); /* performance counters */
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} else {
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for (i=0; i < argc; i++) {
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sscanf(argv[i], "0x%x", ®);
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dump_range(reg, reg + 4);
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if (decode_bits)
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bit_decode(*(volatile uint32_t *)((volatile char*)mmio + reg));
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}
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}
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intel_register_access_fini();
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out:
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free(cmdname);
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return ret;
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}
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