Ben Widawsky 099a92ea28 quick_dump: Add more ring registers ...

START + CTL (and reorder them in the file)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

2013-05-22 15:54:53 -07:00

..

base_display.txt

quick_dump: A dump utility different than reg_dumper

2013-02-07 16:42:18 -08:00

base_interrupt.txt

quick_dump: A dump utility different than reg_dumper

2013-02-07 16:42:18 -08:00

base_other.txt

quick_dump: A dump utility different than reg_dumper

2013-02-07 16:42:18 -08:00

base_power.txt

quick_dump: A dump utility different than reg_dumper

2013-02-07 16:42:18 -08:00

base_rings.txt

quick_dump: Add more ring registers

2013-05-22 15:54:53 -07:00

chipset.i

intel_mmio: Add intel_register_access_needs_fakewake

2013-04-26 14:34:48 -07:00

gen6_other.txt

quick_dump: gen6 support

2013-02-07 16:42:18 -08:00

gen7_other.txt

quick_dump: gen7 support

2013-02-07 16:42:18 -08:00

intel_chipset.c

quick_dump: Connect libpciaccess and other utils

2013-02-07 18:21:55 -08:00

ivybridge

quick_dump: gen7 support

2013-02-07 16:42:18 -08:00

Makefile.am

quick_dump: Add dpio read

2013-04-17 19:02:41 +02:00

quick_dump.py

quick_dump: say something when reg init fails

2013-04-16 14:06:02 -07:00

reg_access.py

intel_mmio: Add intel_register_access_needs_fakewake

2013-04-26 14:34:48 -07:00

sandybridge

quick_dump: gen6 support

2013-02-07 16:42:18 -08:00

valleyview

quick_dump: vlv support

2013-02-07 16:42:18 -08:00

vlv_display.txt

fixup VLV reg offsets, add a few more

2013-04-16 13:41:23 -07:00

vlv_power.txt

fixup VLV reg offsets, add a few more

2013-04-16 13:41:23 -07:00