mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-07 16:06:25 +00:00
804e11f40d
Add a header that includes all the headers for the library. This allows reorganisation of the library without affecting programs using it and also simplifies the headers that need to be included to use the library. Signed-off-by: Thomas Wood <thomas.wood@intel.com>
411 lines
11 KiB
C
411 lines
11 KiB
C
/* wierd use of API tests */
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/* test1- export buffer from intel, import same fd twice into nouveau,
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check handles match
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test2 - export buffer from intel, import fd once, close fd, try import again
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fail if it succeeds
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test3 - export buffer from intel, import twice on nouveau, check handle is the same
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test4 - export handle twice from intel, import into nouveau twice, check handle is the same
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*/
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#include "igt.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <sys/stat.h>
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#include "intel_bufmgr.h"
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#include "nouveau.h"
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#define BO_SIZE (256*1024)
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int intel_fd = -1, intel_fd2 = -1, nouveau_fd = -1, nouveau_fd2 = -1;
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drm_intel_bufmgr *bufmgr;
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drm_intel_bufmgr *bufmgr2;
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struct nouveau_device *ndev, *ndev2;
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struct nouveau_client *nclient, *nclient2;
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uint32_t devid;
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struct intel_batchbuffer *intel_batch;
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static void find_and_open_devices(void)
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{
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int i;
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char path[80];
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struct stat buf;
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FILE *fl;
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char vendor_id[8];
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int venid;
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for (i = 0; i < 9; i++) {
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char *ret;
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sprintf(path, "/sys/class/drm/card%d/device/vendor", i);
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if (stat(path, &buf))
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break;
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fl = fopen(path, "r");
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if (!fl)
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break;
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ret = fgets(vendor_id, 8, fl);
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igt_assert(ret);
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fclose(fl);
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venid = strtoul(vendor_id, NULL, 16);
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sprintf(path, "/dev/dri/card%d", i);
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if (venid == 0x8086) {
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intel_fd = open(path, O_RDWR);
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igt_assert(intel_fd);
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intel_fd2 = open(path, O_RDWR);
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igt_assert(intel_fd2);
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} else if (venid == 0x10de) {
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nouveau_fd = open(path, O_RDWR);
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igt_assert(nouveau_fd);
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nouveau_fd2 = open(path, O_RDWR);
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igt_assert(nouveau_fd2);
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}
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}
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}
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static void test_i915_nv_import_twice(void)
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{
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drm_intel_bo *test_intel_bo;
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int prime_fd;
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struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
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test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
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igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
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igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
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igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0);
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close(prime_fd);
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nouveau_bo_ref(NULL, &nvbo2);
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nouveau_bo_ref(NULL, &nvbo);
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drm_intel_bo_unreference(test_intel_bo);
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}
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static void test_i915_nv_import_twice_check_flink_name(void)
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{
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drm_intel_bo *test_intel_bo;
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int prime_fd;
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struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
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uint32_t flink_name1, flink_name2;
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test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
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igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
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igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
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igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0);
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close(prime_fd);
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igt_assert(nouveau_bo_name_get(nvbo, &flink_name1) == 0);
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igt_assert(nouveau_bo_name_get(nvbo2, &flink_name2) == 0);
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igt_assert_eq_u32(flink_name1, flink_name2);
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nouveau_bo_ref(NULL, &nvbo2);
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nouveau_bo_ref(NULL, &nvbo);
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drm_intel_bo_unreference(test_intel_bo);
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}
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static void test_i915_nv_reimport_twice_check_flink_name(void)
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{
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drm_intel_bo *test_intel_bo;
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int prime_fd;
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struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
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uint32_t flink_name1, flink_name2;
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test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
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igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
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igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
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/* create a new dma-buf */
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close(prime_fd);
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igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
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igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0);
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close(prime_fd);
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igt_assert(nouveau_bo_name_get(nvbo, &flink_name1) == 0);
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igt_assert(nouveau_bo_name_get(nvbo2, &flink_name2) == 0);
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igt_assert_eq_u32(flink_name1, flink_name2);
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nouveau_bo_ref(NULL, &nvbo2);
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nouveau_bo_ref(NULL, &nvbo);
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drm_intel_bo_unreference(test_intel_bo);
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}
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static void test_nv_i915_import_twice_check_flink_name(void)
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{
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drm_intel_bo *intel_bo = NULL, *intel_bo2 = NULL;
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int prime_fd;
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struct nouveau_bo *nvbo = NULL;
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uint32_t flink_name1, flink_name2;
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igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
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0, BO_SIZE, NULL, &nvbo) == 0);
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igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
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intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
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igt_assert(intel_bo);
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intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE);
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igt_assert(intel_bo2);
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close(prime_fd);
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igt_assert(drm_intel_bo_flink(intel_bo, &flink_name1) == 0);
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igt_assert(drm_intel_bo_flink(intel_bo2, &flink_name2) == 0);
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igt_assert_eq_u32(flink_name1, flink_name2);
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nouveau_bo_ref(NULL, &nvbo);
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drm_intel_bo_unreference(intel_bo);
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drm_intel_bo_unreference(intel_bo2);
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}
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static void test_nv_i915_reimport_twice_check_flink_name(void)
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{
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drm_intel_bo *intel_bo = NULL, *intel_bo2 = NULL;
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int prime_fd;
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struct nouveau_bo *nvbo = NULL;
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uint32_t flink_name1, flink_name2;
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igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
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0, BO_SIZE, NULL, &nvbo) == 0);
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igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
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intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
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igt_assert(intel_bo);
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close(prime_fd);
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igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
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intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE);
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igt_assert(intel_bo2);
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close(prime_fd);
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igt_assert(drm_intel_bo_flink(intel_bo, &flink_name1) == 0);
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igt_assert(drm_intel_bo_flink(intel_bo2, &flink_name2) == 0);
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igt_assert_eq_u32(flink_name1, flink_name2);
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nouveau_bo_ref(NULL, &nvbo);
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drm_intel_bo_unreference(intel_bo);
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drm_intel_bo_unreference(intel_bo2);
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}
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static void test_i915_nv_import_vs_close(void)
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{
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drm_intel_bo *test_intel_bo;
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int prime_fd;
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struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
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test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
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igt_assert(test_intel_bo);
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igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
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igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
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close(prime_fd);
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igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) < 0);
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nouveau_bo_ref(NULL, &nvbo2);
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nouveau_bo_ref(NULL, &nvbo);
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drm_intel_bo_unreference(test_intel_bo);
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}
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/* import handle twice on one driver */
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static void test_i915_nv_double_import(void)
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{
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drm_intel_bo *test_intel_bo;
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int prime_fd;
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struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
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test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
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igt_assert(test_intel_bo);
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igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
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igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
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igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo2) == 0);
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close(prime_fd);
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igt_assert(nvbo->handle == nvbo2->handle);
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nouveau_bo_ref(NULL, &nvbo2);
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nouveau_bo_ref(NULL, &nvbo);
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drm_intel_bo_unreference(test_intel_bo);
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}
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/* export handle twice from one driver - import twice
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see if we get same object */
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static void test_i915_nv_double_export(void)
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{
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drm_intel_bo *test_intel_bo;
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int prime_fd, prime_fd2;
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struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
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test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
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igt_assert(test_intel_bo);
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drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
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drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd2);
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igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
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close(prime_fd);
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igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd2, &nvbo2) == 0);
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close(prime_fd2);
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igt_assert(nvbo->handle == nvbo2->handle);
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nouveau_bo_ref(NULL, &nvbo2);
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nouveau_bo_ref(NULL, &nvbo);
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drm_intel_bo_unreference(test_intel_bo);
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}
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/* export handle from intel driver - reimport to intel driver
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see if you get same object */
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static void test_i915_self_import(void)
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{
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drm_intel_bo *test_intel_bo, *test_intel_bo2;
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int prime_fd;
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test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
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drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
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test_intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
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close(prime_fd);
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igt_assert(test_intel_bo2);
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igt_assert(test_intel_bo->handle == test_intel_bo2->handle);
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drm_intel_bo_unreference(test_intel_bo);
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}
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/* nouveau export reimport test */
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static void test_nv_self_import(void)
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{
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int prime_fd;
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struct nouveau_bo *nvbo, *nvbo2;
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igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
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0, BO_SIZE, NULL, &nvbo) == 0);
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igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
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igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo2) == 0);
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close(prime_fd);
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igt_assert(nvbo->handle == nvbo2->handle);
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nouveau_bo_ref(NULL, &nvbo);
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nouveau_bo_ref(NULL, &nvbo2);
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}
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/* export handle from intel driver - reimport to another intel driver bufmgr
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see if you get same object */
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static void test_i915_self_import_to_different_fd(void)
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{
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drm_intel_bo *test_intel_bo, *test_intel_bo2;
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int prime_fd;
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test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
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drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
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test_intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE);
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close(prime_fd);
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igt_assert(test_intel_bo2);
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drm_intel_bo_unreference(test_intel_bo2);
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drm_intel_bo_unreference(test_intel_bo);
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}
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/* nouveau export reimport to other driver test */
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static void test_nv_self_import_to_different_fd(void)
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{
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int prime_fd;
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struct nouveau_bo *nvbo, *nvbo2;
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igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
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0, BO_SIZE, NULL, &nvbo) == 0);
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igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
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igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0);
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close(prime_fd);
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/* not sure what to test for, just make sure we don't explode */
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nouveau_bo_ref(NULL, &nvbo);
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nouveau_bo_ref(NULL, &nvbo2);
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}
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igt_main
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{
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igt_fixture {
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find_and_open_devices();
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igt_require(nouveau_fd != -1);
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igt_require(nouveau_fd2 != -1);
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igt_require(intel_fd != -1);
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igt_require(intel_fd2 != -1);
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/* set up intel bufmgr */
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bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096);
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igt_assert(bufmgr);
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/* Do not enable reuse, we share (almost) all buffers. */
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//drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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bufmgr2 = drm_intel_bufmgr_gem_init(intel_fd2, 4096);
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igt_assert(bufmgr2);
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drm_intel_bufmgr_gem_enable_reuse(bufmgr2);
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/* set up nouveau bufmgr */
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igt_assert(nouveau_device_wrap(nouveau_fd, 0, &ndev) >= 0);
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igt_assert(nouveau_client_new(ndev, &nclient) >= 0);
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/* set up nouveau bufmgr */
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igt_assert(nouveau_device_wrap(nouveau_fd2, 0, &ndev2) >= 0);
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igt_assert(nouveau_client_new(ndev2, &nclient2) >= 0);;
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/* set up an intel batch buffer */
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devid = intel_get_drm_devid(intel_fd);
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intel_batch = intel_batchbuffer_alloc(bufmgr, devid);
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igt_assert(intel_batch);
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}
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#define xtest(name) \
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igt_subtest(#name) \
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test_##name();
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xtest(i915_nv_import_twice);
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xtest(i915_nv_import_twice_check_flink_name);
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xtest(i915_nv_reimport_twice_check_flink_name);
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xtest(nv_i915_import_twice_check_flink_name);
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xtest(nv_i915_reimport_twice_check_flink_name);
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xtest(i915_nv_import_vs_close);
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xtest(i915_nv_double_import);
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xtest(i915_nv_double_export);
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xtest(i915_self_import);
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xtest(nv_self_import);
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xtest(i915_self_import_to_different_fd);
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xtest(nv_self_import_to_different_fd);
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igt_fixture {
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intel_batchbuffer_free(intel_batch);
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nouveau_device_del(&ndev);
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drm_intel_bufmgr_destroy(bufmgr);
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close(intel_fd);
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close(nouveau_fd);
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}
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}
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