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https://github.com/tiagovignatti/intel-gpu-tools.git
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241 lines
6.4 KiB
C
241 lines
6.4 KiB
C
/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Ben Widawsky <ben@bwidawsk.net>
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*
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*/
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/*
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* This test covers basic context switch functionality
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*/
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#include "igt.h"
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#include <unistd.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/ioctl.h>
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#include <sys/time.h>
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#include <drm.h>
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IGT_TEST_DESCRIPTION("Test basic context switch functionality.");
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/* Copied from gem_exec_nop.c */
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static int exec(int fd, uint32_t handle, int ring, int ctx_id)
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{
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struct drm_i915_gem_execbuffer2 execbuf;
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struct drm_i915_gem_exec_object2 gem_exec;
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int ret = 0;
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gem_exec.handle = handle;
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gem_exec.relocation_count = 0;
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gem_exec.relocs_ptr = 0;
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gem_exec.alignment = 0;
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gem_exec.offset = 0;
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gem_exec.flags = 0;
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gem_exec.rsvd1 = 0;
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gem_exec.rsvd2 = 0;
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execbuf.buffers_ptr = (uintptr_t)&gem_exec;
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execbuf.buffer_count = 1;
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execbuf.batch_start_offset = 0;
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execbuf.batch_len = 8;
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execbuf.cliprects_ptr = 0;
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execbuf.num_cliprects = 0;
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execbuf.DR1 = 0;
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execbuf.DR4 = 0;
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execbuf.flags = ring;
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i915_execbuffer2_set_context_id(execbuf, ctx_id);
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execbuf.rsvd2 = 0;
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ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
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&execbuf);
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return ret;
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}
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static void big_exec(int fd, uint32_t handle, int ring)
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{
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struct drm_i915_gem_execbuffer2 execbuf;
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struct drm_i915_gem_exec_object2 *gem_exec;
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uint32_t ctx_id1, ctx_id2;
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int num_buffers = gem_available_aperture_size(fd) / 4096;
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int i;
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/* Make sure we only fill half of RAM with gem objects. */
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igt_require(intel_get_total_ram_mb() * 1024 / 2 > num_buffers * 4);
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gem_exec = calloc(num_buffers + 1, sizeof(*gem_exec));
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igt_assert(gem_exec);
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memset(gem_exec, 0, (num_buffers + 1) * sizeof(*gem_exec));
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ctx_id1 = gem_context_create(fd);
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ctx_id2 = gem_context_create(fd);
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gem_exec[0].handle = handle;
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execbuf.buffers_ptr = (uintptr_t)gem_exec;
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execbuf.buffer_count = num_buffers + 1;
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execbuf.batch_start_offset = 0;
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execbuf.batch_len = 8;
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execbuf.cliprects_ptr = 0;
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execbuf.num_cliprects = 0;
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execbuf.DR1 = 0;
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execbuf.DR4 = 0;
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execbuf.flags = ring;
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execbuf.rsvd2 = 0;
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execbuf.buffer_count = 1;
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i915_execbuffer2_set_context_id(execbuf, ctx_id1);
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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for (i = 0; i < num_buffers; i++) {
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uint32_t tmp_handle = gem_create(fd, 4096);
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gem_exec[i].handle = tmp_handle;
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}
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gem_exec[i].handle = handle;
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execbuf.buffer_count = i + 1;
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/* figure out how many buffers we can exactly fit */
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while (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
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&execbuf) != 0) {
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i--;
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gem_close(fd, gem_exec[i].handle);
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gem_exec[i].handle = handle;
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execbuf.buffer_count--;
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igt_info("trying buffer count %i\n", i - 1);
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}
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igt_info("reduced buffer count to %i from %i\n",
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i - 1, num_buffers);
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/* double check that it works */
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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i915_execbuffer2_set_context_id(execbuf, ctx_id2);
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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gem_sync(fd, handle);
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}
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uint32_t handle;
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uint32_t batch[2] = {0, MI_BATCH_BUFFER_END};
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uint32_t ctx_id, ctx_id2;
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int fd;
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igt_main
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{
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igt_skip_on_simulation();
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igt_fixture {
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fd = drm_open_driver_render(DRIVER_INTEL);
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handle = gem_create(fd, 4096);
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/* check that we can create contexts. */
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ctx_id = gem_context_create(fd);
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gem_context_destroy(fd, ctx_id);
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gem_write(fd, handle, 0, batch, sizeof(batch));
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}
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igt_subtest("basic") {
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ctx_id = gem_context_create(fd);
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igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) == 0);
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gem_sync(fd, handle);
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gem_context_destroy(fd, ctx_id);
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ctx_id = gem_context_create(fd);
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igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) == 0);
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gem_sync(fd, handle);
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gem_context_destroy(fd, ctx_id);
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igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) < 0);
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gem_sync(fd, handle);
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}
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igt_subtest("eviction")
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big_exec(fd, handle, I915_EXEC_RENDER);
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igt_subtest("reset-pin-leak") {
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int i;
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/*
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* Use an explicit context to isolate the test from
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* any major code changes related to the per-file
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* default context (eg. if they would be eliminated).
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*/
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ctx_id = gem_context_create(fd);
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/*
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* Iterate enough times that the kernel will
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* become unhappy if the ggtt pin count for
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* the last context is leaked at every reset.
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*/
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for (i = 0; i < 20; i++) {
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igt_hang_ring_t hang = igt_hang_ring(fd, I915_EXEC_RENDER);
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igt_assert(exec(fd, handle, I915_EXEC_RENDER, 0) == 0);
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igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) == 0);
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igt_post_hang_ring(fd, hang);
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}
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gem_context_destroy(fd, ctx_id);
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}
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igt_subtest("lrc-lite-restore") {
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int i, j;
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/*
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* Need 2 contexts to be able to replicate a lite restore,
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* i.e. a running context is resubmitted.
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*/
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ctx_id = gem_context_create(fd);
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ctx_id2 = gem_context_create(fd);
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/*
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* Queue several small batchbuffers to be sure we'll send execlists
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* with 2 valid context, and likely cause a lite restore when ctxB
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* is resubmitted at the top of the new execlist.
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*/
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for (i = 0; i < 20; i++) {
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for (j = 0; j < 200; j++) {
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igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id) == 0);
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igt_assert(exec(fd, handle, I915_EXEC_RENDER, ctx_id2) == 0);
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}
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gem_sync(fd, handle);
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}
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gem_context_destroy(fd, ctx_id);
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gem_context_destroy(fd, ctx_id2);
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}
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}
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