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https://github.com/tiagovignatti/intel-gpu-tools.git
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Execute the batch concurrently on all rings and then wait (as opposed to executing a different batch on each engine). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
239 lines
6.0 KiB
C
239 lines
6.0 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <time.h>
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#include "igt.h"
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IGT_TEST_DESCRIPTION("Basic check of ring<->ring write synchronisation.");
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/*
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* Testcase: Basic check of sync
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*
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* Extremely efficient at catching missed irqs
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*/
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static double gettime(void)
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{
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static clockid_t clock = -1;
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struct timespec ts;
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/* Stay on the same clock for consistency. */
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if (clock != (clockid_t)-1) {
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if (clock_gettime(clock, &ts))
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goto error;
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goto out;
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}
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#ifdef CLOCK_MONOTONIC_RAW
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if (!clock_gettime(clock = CLOCK_MONOTONIC_RAW, &ts))
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goto out;
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#endif
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#ifdef CLOCK_MONOTONIC_COARSE
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if (!clock_gettime(clock = CLOCK_MONOTONIC_COARSE, &ts))
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goto out;
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#endif
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if (!clock_gettime(clock = CLOCK_MONOTONIC, &ts))
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goto out;
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error:
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igt_warn("Could not read monotonic time: %s\n",
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strerror(errno));
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igt_assert(0);
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return 0;
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out:
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return ts.tv_sec + 1e-9*ts.tv_nsec;
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}
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static void
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sync_ring(int fd, unsigned ring, int num_children)
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{
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unsigned engines[16];
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const char *names[16];
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int num_engines = 0;
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if (ring == ~0u) {
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const struct intel_execution_engine *e;
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for (e = intel_execution_engines; e->name; e++) {
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if (e->exec_id == 0)
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continue;
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if (!gem_has_ring(fd, e->exec_id | e->flags))
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continue;
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if (e->exec_id == I915_EXEC_BSD) {
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int is_bsd2 = e->flags != 0;
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if (gem_has_bsd2(fd) != is_bsd2)
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continue;
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}
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names[num_engines] = e->name;
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engines[num_engines++] = e->exec_id | e->flags;
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if (num_engines == ARRAY_SIZE(engines))
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break;
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}
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num_children *= num_engines;
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} else {
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gem_require_ring(fd, ring);
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names[num_engines] = NULL;
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engines[num_engines++] = ring;
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}
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intel_detect_and_clear_missed_interrupts(fd);
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igt_fork(child, num_children) {
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const uint32_t bbe = MI_BATCH_BUFFER_END;
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struct drm_i915_gem_exec_object2 object;
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struct drm_i915_gem_execbuffer2 execbuf;
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double start, elapsed;
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unsigned long cycles;
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memset(&object, 0, sizeof(object));
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object.handle = gem_create(fd, 4096);
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gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));
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memset(&execbuf, 0, sizeof(execbuf));
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execbuf.buffers_ptr = (uintptr_t)&object;
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execbuf.buffer_count = 1;
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execbuf.flags = engines[child % num_engines];
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gem_execbuf(fd, &execbuf);
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start = gettime();
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cycles = 0;
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do {
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do {
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gem_execbuf(fd, &execbuf);
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gem_sync(fd, object.handle);
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} while (++cycles & 1023);
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} while ((elapsed = gettime() - start) < SLOW_QUICK(10, 1));
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igt_info("%s%sompleted %ld cycles: %.3f us\n",
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names[child % num_engines] ?: "",
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names[child % num_engines] ? " c" : "C",
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cycles, elapsed*1e6/cycles);
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gem_close(fd, object.handle);
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}
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igt_waitchildren_timeout(20, NULL);
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igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
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}
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static void
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sync_all(int fd, int num_children)
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{
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const struct intel_execution_engine *e;
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unsigned engines[16];
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int num_engines = 0;
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for (e = intel_execution_engines; e->name; e++) {
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if (e->exec_id == 0)
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continue;
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if (!gem_has_ring(fd, e->exec_id | e->flags))
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continue;
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if (e->exec_id == I915_EXEC_BSD) {
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int is_bsd2 = e->flags != 0;
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if (gem_has_bsd2(fd) != is_bsd2)
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continue;
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}
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engines[num_engines++] = e->exec_id | e->flags;
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if (num_engines == ARRAY_SIZE(engines))
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break;
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}
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igt_require(num_engines);
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intel_detect_and_clear_missed_interrupts(fd);
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igt_fork(child, num_children) {
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const uint32_t bbe = MI_BATCH_BUFFER_END;
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struct drm_i915_gem_exec_object2 object;
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struct drm_i915_gem_execbuffer2 execbuf;
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double start, elapsed;
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unsigned long cycles;
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memset(&object, 0, sizeof(object));
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object.handle = gem_create(fd, 4096);
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gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));
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memset(&execbuf, 0, sizeof(execbuf));
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execbuf.buffers_ptr = (uintptr_t)&object;
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execbuf.buffer_count = 1;
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gem_execbuf(fd, &execbuf);
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start = gettime();
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cycles = 0;
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do {
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do {
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for (int n = 0; n < num_engines; n++) {
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execbuf.flags = engines[n];
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gem_execbuf(fd, &execbuf);
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}
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gem_sync(fd, object.handle);
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} while (++cycles & 1023);
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} while ((elapsed = gettime() - start) < SLOW_QUICK(10, 1));
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igt_info("Completed %ld cycles: %.3f us\n",
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cycles, elapsed*1e6/cycles);
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gem_close(fd, object.handle);
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}
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igt_waitchildren_timeout(20, NULL);
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igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
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}
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igt_main
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{
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const struct intel_execution_engine *e;
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const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
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int fd = -1;
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igt_skip_on_simulation();
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igt_fixture
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fd = drm_open_driver(DRIVER_INTEL);
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igt_fork_hang_detector(fd);
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for (e = intel_execution_engines; e->name; e++) {
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igt_subtest_f("basic-%s", e->name)
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sync_ring(fd, e->exec_id | e->flags, 1);
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igt_subtest_f("forked-%s", e->name)
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sync_ring(fd, e->exec_id | e->flags, ncpus);
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}
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igt_subtest("basic-each")
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sync_ring(fd, ~0u, 1);
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igt_subtest("forked-each")
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sync_ring(fd, ~0u, ncpus);
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igt_subtest("basic-all")
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sync_all(fd, 1);
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igt_subtest("forked-all")
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sync_all(fd, ncpus);
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igt_stop_hang_detector();
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igt_fixture
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close(fd);
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}
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