7 Commits

Author SHA1 Message Date
Chris Wilson
982f7eb238 Prepare for 64bit relocation addresses
This reveal that quite a few locations were writing relocation offsets
but only allowing for 32 bit addresses. To reveal such places in active
tests, we also now double check that we do not use more batch space than
declared.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2014-08-29 20:02:10 +01:00
Daniel Vetter
baa6f8b34f lib/rendercopy*: Use igt_assert 2014-08-26 15:03:40 +02:00
Tvrtko Ursulin
dc14bf455d tests: Extract ALIGN macro into a common header
Makes for a little bit less code duplication, especially since
it will be used from more callers in the future.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Brad Volkin <bradley.d.volkin@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2014-04-24 13:49:19 +01:00
Daniel Vetter
924115bfcd lib: more unecessary header removal
This time big with media_fill.h

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-03-22 20:18:51 +01:00
Daniel Vetter
6cfcd71589 lib: remove uncessary #includes from headers
Only include what the header itself needs. The big fish here is
intel-gpu-tools.h. More will follow.

One ugly thing removed here is the duplicated GEN6_TD_CTL #define, one
of which was broken.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-03-22 20:08:13 +01:00
Daniel Vetter
83a4c7d3eb lib/intel_batchbuffer: igt_ namespace for the buffer structure
Step one to properly namespace the rendercpy/mediafill functions. Als
give the buf_height/width helpers a proper igt_ prefix.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-03-22 15:44:48 +01:00
Xiang, Haihao
bd384c2ba3 tests/gem_media_fill: add support for gen8
v2: Fixed the source register used for the send with EOT
    Fixed the posted destination operand for the send with EOT

v3: Workaround: Insert MEDIA_STATE_FLUSH after MEDIA_OBJECT.
    Fixed the cache agent used in media_block_write message
    Set Instruction Buffer size Modify Enable to 1, otherwise it may result in GPU hang

Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-12-06 15:11:05 +08:00