With PLANE1 and PIPE CRC sources the test will work on all currently
shipping (and planed fwiw) platforms.
Also add all the other new sources for non-ivb/hsw chips.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Let's add a new test that sets a mode, wait for a few vblanks (3) and
then make sure we read 3 identical CRCs.
Some subtests check for various parsing errors.
In the process, improve the debugfs helpers to deal with CRCs.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
