Similar to the previous commit, we also want to check that every
pipeline is serialised correctly. This extends the test to include
render copies as well as blits.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
In future, we may allow reordering of GPU batches. This implements a
simple race detector by extending the current CPU-vs-GPU checks.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Some of the workarounds are lost followed by a gpu reset, suspend/resume;
this patch adds a test which compares register state before and after
the test scenario.
This test currently verifies only bdw workarounds.
v2: address patch cleanup comments (ThomasW)
Add binary to ignore list and use igt_debugfs helper fns
to read debugfs file and igt_info for printing debug info.
v2.1: address minor comments from Daniel
use igt_main as opposed to normal main
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
[danvet: Drop igt_exit, it's already in igt_main.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Since planes are universal now, using commit2 so that drmModeSetPlane can be
called for primary plane as well instead of drmModeSetCrtc. drmModeSetPlane will
update the x,y,w,h for the plane.
Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Combine two subtests(rc6_residency_check and rc6_residency_counter)
into one subtest(residency_accuracy)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
gem_mmap seg faults when all tests are run together. This occurs because
the new-object subtest closes the gem object, but short-mmap assumes
it still exists. Thus gem_mmap__cpu() returns nil for addr and memset()
seg faults. This patch makes new-object and short-mmap create and
close their own gem objects.
Signed-off-by: Mike Mason <michael.w.mason@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
kms_flip_event_leak depends on cairo, so add it to the
list of tests to skip (in Android.mk) if ANDROID_HAS_CAIRO
is not set to 1.
Signed-off-by: Tim Gore <tim.gore@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
This patch just adds kms_flip_event_leak to tests/.gitignore.
Signed-off-by: Mike Mason <michael.w.mason@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Make sure the rotation is reset after the VT mode is restored by
collecting the unrotated CRC and comparing with the CRC value after VT mode
has been restored. The CRC is used to ensure the hardware state is checked,
rather than any software state.
References: https://bugs.freedesktop.org/show_bug.cgi?id=82236
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
kms_flip_event_leak will issue a page flip and close the file
descriptor before the flip has finished. This may cause the kernel
to leak the page flip event. The test itself won't actually fail but
if the kernel notices the leak and WARNs piglit will report a failure.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Refactor the code so the params for the modesets are always stored and
don't have to be recomputed every time. With this, we can get rid of
our FB caching structures, and we now also allow the subtests that do
special modesets to reuse the parameters used on the default modesets,
just changing whatever they want.
The biggest win here is that the test case subfunctions get smaller
and simpler to read and write.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
And its and_wait() version. The goal is to extract common code
patterns into functions/macros, so the code for the test cases gets
easier to read and write.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Daniel thought fences were not surviving runtime PM on DPMS, so we
wrote this test to check. The good news is that the test passed, so
there's no need for a Kernel patch, at least on the Kernel I tested.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Both pm_rpm.c and pm_lpsp.c call it "disable_all_screens", but let's
give it a name that better describes what the implementation does.
v2: Rename to kmstest_unset_all_crtcs (Daniel).
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
These tests should trigger WARNs on Kernels that don't have the most
recent fixes.
v2: - Merge both the cursor and planes patches into one so it's easier
to update them.
- Extend the tests a little bit to exercise fences.
- Fix bug found by Matt to enable the test to run on older Kernels
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
testdisplay does not have any subtests and should therefore exit with
the appropriate exit code if the --list-subtests or --run-subtest
options are used.
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
The load_helper isn't killed by the signal, but it exits gracefully. So
update the assertion to check for the successful exit.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
The Piglit test runner for intel-gpu-tools creates a new process group
for the test processes, so attempting to set terminal attributes causes
the process to receive SIGTTOU and be stopped. Since the test is not run
interactively in this case, the issue can be avoided by not setting
terminal attributes if the process is not in the foreground process
group.
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
commit 745945546f7366a413a3a51a37f90caa3a227b1d
breaks the build under Android because some of the
macros used in pm_rps.c are defined in sys/wait.h
which is not included.
Signed-off-by: Tim Gore <tim.gore@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reduce code duplication as the igt_stop_helper can reuse
igt_wait_helper() to replace its own waiting routine.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Two parts to the fix:
1. Do not use pthread_cancel since not available on Android.
2. Do not assert in the thread since that does not get propagated
to the process. Rather pass out any failures so we know test
did not work as expected.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Tim Gore <tim.gore@intel.com>
Reviewed-by: Tim Gore <tim.gore@intel.com>
