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rendercopy/bdw: Fix the STATE_SIP instruction length

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Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau 2013-11-22 17:36:54 +00:00
parent b333d23e3a
commit ffff68f08a
1 changed files with 4 additions and 3 deletions
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7
lib/rendercopy_gen8.c
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@ -471,8 +471,9 @@ gen6_create_scissor_rect(struct intel_batchbuffer *batch)
} }
static void static void
gen6_emit_sip(struct intel_batchbuffer *batch) { gen8_emit_sip(struct intel_batchbuffer *batch) {
OUT_BATCH(GEN6_STATE_SIP | 0); OUT_BATCH(GEN6_STATE_SIP | (3 - 2));
OUT_BATCH(0);
OUT_BATCH(0); OUT_BATCH(0);
} }
@ -889,7 +890,7 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
* order */ * order */
OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D); OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D);
gen6_emit_sip(batch); gen8_emit_sip(batch);
gen7_emit_push_constants(batch); gen7_emit_push_constants(batch);