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https://github.com/tiagovignatti/intel-gpu-tools.git
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bdw: Update obvious missing blit support
This provides a macro that allows us to update all the arbitrary blit commands we have stuck throughout the code. It assumes we don't actually use 64b relocs (which is currently true). This also allows us to easily find all the areas we need to update later when we really use the upper dword. This block was done mostly with a sed job, and represents the easier in test blit implementations. v2 by Oscar: s/OUT_BATCH/BEGIN_BATCH in BLIT_COPY_BATCH_START CC: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
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@@ -80,7 +80,7 @@
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#define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1)
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#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6)
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#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22))
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#define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21)
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#define XY_SRC_COPY_BLT_WRITE_RGB (1<<20)
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#define XY_SRC_COPY_BLT_SRC_TILED (1<<15)
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@@ -239,17 +239,18 @@ intel_blt_copy(struct intel_batchbuffer *batch,
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CHECK_RANGE(src_pitch) && CHECK_RANGE(dst_pitch));
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#undef CHECK_RANGE
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BEGIN_BATCH(8);
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OUT_BATCH(XY_SRC_COPY_BLT_CMD | cmd_bits);
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BLIT_COPY_BATCH_START(batch->devid, cmd_bits);
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OUT_BATCH((br13_bits) |
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(0xcc << 16) | /* copy ROP */
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dst_pitch);
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OUT_BATCH((dst_y1 << 16) | dst_x1); /* dst x1,y1 */
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OUT_BATCH(((dst_y1 + height) << 16) | (dst_x1 + width)); /* dst x2,y2 */
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OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
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BLIT_RELOC_UDW(batch->devid);
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OUT_BATCH((src_y1 << 16) | src_x1); /* src x1,y1 */
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OUT_BATCH(src_pitch);
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OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
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BLIT_RELOC_UDW(batch->devid);
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ADVANCE_BATCH();
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intel_batchbuffer_flush(batch);
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@@ -96,6 +96,28 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
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#define ADVANCE_BATCH() do { \
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} while(0)
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#define BLIT_COPY_BATCH_START(devid, flags) do { \
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if (intel_gen(devid) >= 8) { \
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BEGIN_BATCH(10); \
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OUT_BATCH(XY_SRC_COPY_BLT_CMD | \
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XY_SRC_COPY_BLT_WRITE_ALPHA | \
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XY_SRC_COPY_BLT_WRITE_RGB | \
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flags | 8); \
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} else { \
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BEGIN_BATCH(8); \
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OUT_BATCH(XY_SRC_COPY_BLT_CMD | \
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XY_SRC_COPY_BLT_WRITE_ALPHA | \
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XY_SRC_COPY_BLT_WRITE_RGB | \
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flags | 6); \
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} \
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} while(0)
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#define BLIT_RELOC_UDW(devid) do { \
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if (intel_gen(devid) >= 8) { \
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OUT_BATCH(0); \
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} \
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} while(0)
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void
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intel_blt_copy(struct intel_batchbuffer *batch,
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drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch,
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+1
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@@ -2713,7 +2713,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1)
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#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6)
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#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22))
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#define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21)
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#define XY_SRC_COPY_BLT_WRITE_RGB (1<<20)
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#define XY_SRC_COPY_BLT_SRC_TILED (1<<15)
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