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https://github.com/tiagovignatti/intel-gpu-tools.git
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bdw: Update obvious missing blit support
This provides a macro that allows us to update all the arbitrary blit commands we have stuck throughout the code. It assumes we don't actually use 64b relocs (which is currently true). This also allows us to easily find all the areas we need to update later when we really use the upper dword. This block was done mostly with a sed job, and represents the easier in test blit implementations. v2 by Oscar: s/OUT_BATCH/BEGIN_BATCH in BLIT_COPY_BATCH_START CC: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
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@@ -94,19 +94,18 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
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drm_intel_bo_subdata(src_bo, 0, sizeof(data), data);
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/* Render the junk to the dst. */
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BEGIN_BATCH(8);
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OUT_BATCH(XY_SRC_COPY_BLT_CMD |
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XY_SRC_COPY_BLT_WRITE_ALPHA |
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XY_SRC_COPY_BLT_WRITE_RGB);
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BLIT_COPY_BATCH_START(batch->devid, 0);
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OUT_BATCH((3 << 24) | /* 32 bits */
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(0xcc << 16) | /* copy ROP */
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(width * 4) /* dst pitch */);
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OUT_BATCH(0); /* dst x1,y1 */
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OUT_BATCH((height << 16) | width); /* dst x2,y2 */
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OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
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BLIT_RELOC_UDW(batch->devid);
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OUT_BATCH(0); /* src x1,y1 */
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OUT_BATCH(width * 4); /* src pitch */
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OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
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BLIT_RELOC_UDW(batch->devid);
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ADVANCE_BATCH();
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intel_batchbuffer_flush(batch);
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@@ -94,19 +94,18 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
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drm_intel_gem_bo_unmap_gtt(src_bo);
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/* Render the junk to the dst. */
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BEGIN_BATCH(8);
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OUT_BATCH(XY_SRC_COPY_BLT_CMD |
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XY_SRC_COPY_BLT_WRITE_ALPHA |
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XY_SRC_COPY_BLT_WRITE_RGB);
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BLIT_COPY_BATCH_START(batch->devid, 0);
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OUT_BATCH((3 << 24) | /* 32 bits */
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(0xcc << 16) | /* copy ROP */
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(width * 4) /* dst pitch */);
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OUT_BATCH(0); /* dst x1,y1 */
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OUT_BATCH((height << 16) | width); /* dst x2,y2 */
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OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
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BLIT_RELOC_UDW(batch->devid);
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OUT_BATCH(0); /* src x1,y1 */
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OUT_BATCH(width * 4); /* src pitch */
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OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
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BLIT_RELOC_UDW(batch->devid);
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ADVANCE_BATCH();
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intel_batchbuffer_flush(batch);
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@@ -97,19 +97,18 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
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drm_intel_bo_unmap(src_bo);
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/* Render the junk to the dst. */
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BEGIN_BATCH(8);
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OUT_BATCH(XY_SRC_COPY_BLT_CMD |
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XY_SRC_COPY_BLT_WRITE_ALPHA |
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XY_SRC_COPY_BLT_WRITE_RGB);
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BLIT_COPY_BATCH_START(batch->devid, 0);
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OUT_BATCH((3 << 24) | /* 32 bits */
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(0xcc << 16) | /* copy ROP */
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(width * 4) /* dst pitch */);
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OUT_BATCH(0); /* dst x1,y1 */
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OUT_BATCH((height << 16) | width); /* dst x2,y2 */
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OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
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BLIT_RELOC_UDW(batch->devid);
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OUT_BATCH(0); /* src x1,y1 */
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OUT_BATCH(width * 4); /* src pitch */
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OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
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BLIT_RELOC_UDW(batch->devid);
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ADVANCE_BATCH();
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intel_batchbuffer_flush(batch);
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@@ -107,19 +107,18 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
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}
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/* Render the junk to the dst. */
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BEGIN_BATCH(8);
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OUT_BATCH(XY_SRC_COPY_BLT_CMD |
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XY_SRC_COPY_BLT_WRITE_ALPHA |
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XY_SRC_COPY_BLT_WRITE_RGB);
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BLIT_COPY_BATCH_START(batch->devid, 0);
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OUT_BATCH((3 << 24) | /* 32 bits */
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(0xcc << 16) | /* copy ROP */
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(width * 4) /* dst pitch */);
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OUT_BATCH(0); /* dst x1,y1 */
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OUT_BATCH((height << 16) | width); /* dst x2,y2 */
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OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
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BLIT_RELOC_UDW(batch->devid);
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OUT_BATCH(0); /* src x1,y1 */
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OUT_BATCH(width * 4); /* src pitch */
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OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
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BLIT_RELOC_UDW(batch->devid);
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ADVANCE_BATCH();
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intel_batchbuffer_flush(batch);
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