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igt/gem_exec_flush: For good measure, check pread/pwrite
As a point of comparison, test the pread/pwrite interface as well. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -30,8 +30,10 @@ IGT_TEST_DESCRIPTION("Basic check of flushing after batches");
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#define UNCACHED 0
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#define UNCACHED 0
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#define COHERENT 1
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#define COHERENT 1
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#define WRITE 2
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#define WRITE 2
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#define KERNEL 2
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static void run(int fd, unsigned ring, int nchild, unsigned flags, int timeout)
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static void run(int fd, unsigned ring, int nchild, int timeout,
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unsigned flags)
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{
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{
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const int gen = intel_gen(intel_get_drm_devid(fd));
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const int gen = intel_gen(intel_get_drm_devid(fd));
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@ -156,20 +158,39 @@ static void run(int fd, unsigned ring, int nchild, unsigned flags, int timeout)
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execbuf.buffer_count = 2 + xor;
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execbuf.buffer_count = 2 + xor;
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gem_execbuf(fd, &execbuf);
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gem_execbuf(fd, &execbuf);
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gem_sync(fd, obj[0].handle);
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if (!(flags & COHERENT) && !gem_has_llc(fd))
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if (flags & KERNEL) {
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igt_clflush_range(&map[i], sizeof(map[i]));
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uint32_t val;
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if (xor)
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gem_read(fd, obj[0].handle, i*sizeof(uint32_t),
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igt_assert_eq_u32(map[i], i ^ 0xffffffff);
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&val, sizeof(val));
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else
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igt_assert_eq_u32(map[i], i);
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if (flags & WRITE) {
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if (xor)
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map[i] = 0xdeadbeef;
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igt_assert_eq_u32(val, i ^ 0xffffffff);
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if (!(flags & COHERENT))
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else
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igt_assert_eq_u32(val, i);
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if (flags & WRITE) {
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val = 0xdeadbeef;
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gem_write(fd, obj[0].handle, i*sizeof(uint32_t),
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&val, sizeof(val));
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}
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} else {
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gem_sync(fd, obj[0].handle);
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if (!(flags & COHERENT) && !gem_has_llc(fd))
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igt_clflush_range(&map[i], sizeof(map[i]));
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igt_clflush_range(&map[i], sizeof(map[i]));
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if (xor)
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igt_assert_eq_u32(map[i], i ^ 0xffffffff);
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else
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igt_assert_eq_u32(map[i], i);
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if (flags & WRITE) {
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map[i] = 0xdeadbeef;
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if (!(flags & COHERENT))
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igt_clflush_range(&map[i], sizeof(map[i]));
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}
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}
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}
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}
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}
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igt_info("Child[%d]: %lu cycles\n", child, cycles);
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igt_info("Child[%d]: %lu cycles\n", child, cycles);
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@ -187,6 +208,16 @@ igt_main
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{
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{
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const struct intel_execution_engine *e;
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const struct intel_execution_engine *e;
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const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
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const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
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const struct mode {
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const char *name;
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unsigned flags;
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} modes[] = {
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{ "ro", 0 },
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{ "rw", WRITE },
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{ "pro", KERNEL },
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{ "prw", KERNEL | WRITE },
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{ NULL },
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};
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int gen = -1;
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int gen = -1;
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int fd = -1;
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int fd = -1;
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@ -210,21 +241,21 @@ igt_main
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"MI_STORE_DATA broken on gen6 bsd\n");
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"MI_STORE_DATA broken on gen6 bsd\n");
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}
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}
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igt_subtest_f("%suc-ro-%s",
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for (const struct mode *m = modes; m->name; m++) {
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e->exec_id == 0 ? "basic-" : "", e->name)
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igt_subtest_f("%suc-%s-%s",
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run(fd, ring, ncpus, UNCACHED, timeout);
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e->exec_id == 0 ? "basic-" : "",
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m->name,
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e->name)
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run(fd, ring, ncpus, timeout,
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UNCACHED | m->flags);
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igt_subtest_f("%suc-rw-%s",
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igt_subtest_f("%swb-%s-%s",
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e->exec_id == 0 ? "basic-" : "", e->name)
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e->exec_id == 0 ? "basic-" : "",
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run(fd, ring, ncpus, UNCACHED | WRITE, timeout);
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m->name,
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e->name)
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igt_subtest_f("%swb-ro-%s",
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run(fd, ring, ncpus, timeout,
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e->exec_id == 0 ? "basic-" : "", e->name)
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COHERENT | m->flags);
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run(fd, ring, ncpus, COHERENT, timeout);
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}
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igt_subtest_f("%swb-rw-%s",
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e->exec_id == 0 ? "basic-" : "", e->name)
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run(fd, ring, ncpus, COHERENT | WRITE, timeout);
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}
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}
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igt_stop_hang_detector();
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igt_stop_hang_detector();
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