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lib: api docs for intel_batchbuffer
- I didn't bother to document the BLIT batch header macros - I'm not too happy with them and they're fairly obscure. - intel_copy_bo could use some interface love, added a FIXME comment for now. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -39,6 +39,28 @@
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#include "intel_reg.h"
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#include <i915_drm.h>
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/**
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* SECTION:intel_batchbuffer
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* @short_description: Batchbuffer and blitter support
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* @title: intel batchbuffer
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*
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* This library provides some basic support for batchbuffers and using the
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* blitter engine based upon libdrm. A new batchbuffer is allocated with
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* intel_batchbuffer_alloc() and for simple blitter commands submitted with
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* intel_batchbuffer_flush().
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*
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* It also provides some convenient macros to easily emit commands into
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* batchbuffers. All those macros presume that a pointer to a #intel_batchbuffer
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* structure called batch is in scope. The basic macros are #BEGIN_BATCH,
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* #OUT_BATCH, #OUT_RELOC and #ADVANCE_BATCH.
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*/
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/**
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* intel_batchbuffer_reset:
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* @batch: batchbuffer object
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*
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* Resets @batch by allocating a new gem buffer object as backing storage.
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*/
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void
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intel_batchbuffer_reset(struct intel_batchbuffer *batch)
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{
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@ -55,6 +77,16 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch)
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batch->ptr = batch->buffer;
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}
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/**
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* intel_batchbuffer_reset:
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* @bufmgr: libdrm buffer manager
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* @devid: pci device id of the drm device
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*
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* Allocates a new batchbuffer object. @devid must be supplied since libdrm
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* doesn't expose it directly.
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*
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* Returns: The allocated and initialized batchbuffer object.
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*/
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struct intel_batchbuffer *
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intel_batchbuffer_alloc(drm_intel_bufmgr *bufmgr, uint32_t devid)
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{
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@ -67,6 +99,12 @@ intel_batchbuffer_alloc(drm_intel_bufmgr *bufmgr, uint32_t devid)
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return batch;
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}
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/**
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* intel_batchbuffer_reset:
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* @batch: batchbuffer object
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*
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* Releases all resource of the batchbuffer object @batch.
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*/
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void
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intel_batchbuffer_free(struct intel_batchbuffer *batch)
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{
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@ -106,6 +144,13 @@ flush_on_ring_common(struct intel_batchbuffer *batch, int ring)
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return batch->ptr - batch->buffer;
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}
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/**
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* intel_batchbuffer_flush_on_ring:
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* @batch: batchbuffer object
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* @ring: execbuf ring flag
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*
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* Submits the batch for execution on @ring.
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*/
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void
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intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring)
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{
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@ -123,6 +168,14 @@ intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring)
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intel_batchbuffer_reset(batch);
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}
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/**
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* intel_batchbuffer_flush_with_context:
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* @batch: batchbuffer object
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* @context: libdrm hardware context object
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*
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* Submits the batch for execution on the render engine with the supplied
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* hardware context.
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*/
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void
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intel_batchbuffer_flush_with_context(struct intel_batchbuffer *batch,
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drm_intel_context *context)
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@ -145,6 +198,13 @@ intel_batchbuffer_flush_with_context(struct intel_batchbuffer *batch,
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intel_batchbuffer_reset(batch);
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}
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/**
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* intel_batchbuffer_flush:
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* @batch: batchbuffer object
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*
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* Submits the batch for execution on the blitter engine, selecting the right
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* ring depending upon the hardware platform.
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*/
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void
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intel_batchbuffer_flush(struct intel_batchbuffer *batch)
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{
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@ -155,7 +215,21 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
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}
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/* This is the only way buffers get added to the validate list.
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/**
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* intel_batchbuffer_emit_reloc:
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* @batch: batchbuffer object
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* @buffer: relocation target libdrm buffer object
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* @delta: delta value to add to @buffer's gpu address
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* @read_domains: gem domain bits for the relocation
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* @write_domain: gem domain bit for the relocation
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* @fenced: whether this gpu access requires fences
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*
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* Emits both a libdrm relocation entry pointing at @buffer and the pre-computed
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* DWORD of @batch's presumed gpu address plus the supplied @delta into @batch.
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*
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* Note that @fenced is only relevant if @buffer is actually tiled.
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*
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* This is the only way buffers get added to the validate list.
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*/
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void
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intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
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@ -183,6 +257,15 @@ intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
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assert(ret == 0);
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}
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/**
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* intel_batchbuffer_data:
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* @batch: batchbuffer object
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* @data: pointer to the data to write into the batchbuffer
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* @bytes: number of bytes to write into the batchbuffer
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*
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* This transfers the given @data into the batchbuffer. Note that the length
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* must be DWORD aligned, i.e. multiples of 32bits.
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*/
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void
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intel_batchbuffer_data(struct intel_batchbuffer *batch,
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const void *data, unsigned int bytes)
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@ -193,6 +276,24 @@ intel_batchbuffer_data(struct intel_batchbuffer *batch,
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batch->ptr += bytes;
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}
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/**
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* intel_blt_copy:
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* @batch: batchbuffer object
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* @src_bo: source libdrm buffer object
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* @src_x1: source pixel x-coordination
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* @src_y1: source pixel y-coordination
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* @src_pitch: @src_bo's pitch in bytes
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* @dst_bo: destination libdrm buffer object
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* @dst_x1: source pixel x-coordination
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* @dst_y1: source pixel y-coordination
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* @dst_pitch: @dst_bo's pitch in bytes
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* @width: width of the copied rectangle
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* @height: height of the copied rectangle
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* @bpp: bits per pixel
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*
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* This emits a 2D copy operation using blitter commands into the supplied batch
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* buffer object.
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*/
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void
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intel_blt_copy(struct intel_batchbuffer *batch,
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drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch,
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@ -260,6 +361,22 @@ intel_blt_copy(struct intel_batchbuffer *batch,
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intel_batchbuffer_flush(batch);
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}
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/**
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* intel_copy_bo:
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* @batch: batchbuffer object
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* @src_bo: source libdrm buffer object
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* @dst_bo: destination libdrm buffer object
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* @width: width of the copied area in 4-byte pixels
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* @height: height of the copied area in lines
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*
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* This emits a copy operation using blitter commands into the supplied batch
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* buffer object. A total of @width times @height bytes from the start of
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* @src_bo is copied over to @dst_bo.
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*
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* FIXME: We need @width and @height to avoid hitting into platform specific
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* of the blitter. It would be easier to just accept a size and do the math
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* ourselves.
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*/
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void
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intel_copy_bo(struct intel_batchbuffer *batch,
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drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
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@ -71,24 +71,75 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
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intel_batchbuffer_flush(batch);
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}
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/**
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* BEGIN_BATCH:
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* @n: number of DWORDS to emit
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*
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* Prepares a batch to emit @n DWORDS, flushing it if there's not enough space
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* available.
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*
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* This macro needs a pointer to an #intel_batchbuffer structure called batch in
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* scope.
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*/
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#define BEGIN_BATCH(n) do { \
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intel_batchbuffer_require_space(batch, (n)*4); \
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} while (0)
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/**
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* OUT_BATCH:
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* @d: DWORD to emit
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*
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* Emits @d into a batch.
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*
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* This macro needs a pointer to an #intel_batchbuffer structure called batch in
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* scope.
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*/
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#define OUT_BATCH(d) intel_batchbuffer_emit_dword(batch, d)
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/**
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* OUT_RELOC_FENCED:
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* @buf: relocation target libdrm buffer object
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* @read_domains: gem domain bits for the relocation
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* @write_domain: gem domain bit for the relocation
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* @delta: delta value to add to @buffer's gpu address
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*
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* Emits a fenced relocation into a batch.
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*
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* This macro needs a pointer to an #intel_batchbuffer structure called batch in
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* scope.
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*/
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#define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \
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assert((delta) >= 0); \
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intel_batchbuffer_emit_reloc(batch, buf, delta, \
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read_domains, write_domain, 1); \
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} while (0)
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/**
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* OUT_RELOC_FENCED:
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* @buf: relocation target libdrm buffer object
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* @read_domains: gem domain bits for the relocation
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* @write_domain: gem domain bit for the relocation
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* @delta: delta value to add to @buffer's gpu address
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*
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* Emits a normal, unfenced relocation into a batch.
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*
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* This macro needs a pointer to an #intel_batchbuffer structure called batch in
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* scope.
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*/
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#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
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assert((delta) >= 0); \
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intel_batchbuffer_emit_reloc(batch, buf, delta, \
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read_domains, write_domain, 0); \
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} while (0)
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/**
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* ADVANCE_BATCH:
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*
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* Completes the batch command emission sequence started with #BEGIN_BATCH.
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*
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* This macro needs a pointer to an #intel_batchbuffer structure called batch in
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* scope.
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*/
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#define ADVANCE_BATCH() do { \
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} while(0)
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@ -123,6 +174,12 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
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} \
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} while(0)
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/**
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* BLIT_RELOC_UDW:
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* @devid: pci device id of the drm device
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*
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* Emits the upper relocation DWORD on gen8+ and nothing on earlier generations.
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*/
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#define BLIT_RELOC_UDW(devid) do { \
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if (intel_gen(devid) >= 8) { \
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OUT_BATCH(0); \
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