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tests: Add a test for the command parser
Start with a simple testcase that should pass. v2: Switch to I915_PARAM_CMD_PARSER_VERSION Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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tests/.gitignore
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tests/.gitignore
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@ -35,6 +35,7 @@ gem_exec_blt
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gem_exec_faulting_reloc
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gem_exec_faulting_reloc
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gem_exec_lut_handle
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gem_exec_lut_handle
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gem_exec_nop
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gem_exec_nop
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gem_exec_parse
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gem_fd_exhaustion
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gem_fd_exhaustion
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gem_fenced_exec_thrash
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gem_fenced_exec_thrash
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gem_fence_thrash
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gem_fence_thrash
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@ -29,6 +29,7 @@ TESTS_progs_M = \
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gem_exec_bad_domains \
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gem_exec_bad_domains \
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gem_exec_faulting_reloc \
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gem_exec_faulting_reloc \
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gem_exec_nop \
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gem_exec_nop \
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gem_exec_parse \
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gem_fenced_exec_thrash \
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gem_fenced_exec_thrash \
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gem_fence_thrash \
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gem_fence_thrash \
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gem_flink \
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gem_flink \
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140
tests/gem_exec_parse.c
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140
tests/gem_exec_parse.c
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@ -0,0 +1,140 @@
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/*
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* Copyright © 2013 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include <stdlib.h>
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#include <stdint.h>
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#include <stdio.h>
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#include "drm.h"
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#include "i915_drm.h"
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#include "drmtest.h"
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#ifndef I915_PARAM_CMD_PARSER_VERSION
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#define I915_PARAM_CMD_PARSER_VERSION 28
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#endif
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static int exec_batch_patched(int fd, uint32_t cmd_bo, uint32_t *cmds,
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int size, int patch_offset, uint64_t expected_value)
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{
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struct drm_i915_gem_execbuffer2 execbuf;
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struct drm_i915_gem_exec_object2 objs[2];
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struct drm_i915_gem_relocation_entry reloc[1];
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uint32_t target_bo = gem_create(fd, 4096);
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uint64_t actual_value = 0;
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gem_write(fd, cmd_bo, 0, cmds, size);
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reloc[0].offset = patch_offset;
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reloc[0].delta = 0;
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reloc[0].target_handle = target_bo;
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reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
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reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
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reloc[0].presumed_offset = 0;
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objs[0].handle = target_bo;
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objs[0].relocation_count = 0;
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objs[0].relocs_ptr = 0;
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objs[0].alignment = 0;
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objs[0].offset = 0;
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objs[0].flags = 0;
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objs[0].rsvd1 = 0;
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objs[0].rsvd2 = 0;
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objs[1].handle = cmd_bo;
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objs[1].relocation_count = 1;
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objs[1].relocs_ptr = (uintptr_t)reloc;
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objs[1].alignment = 0;
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objs[1].offset = 0;
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objs[1].flags = 0;
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objs[1].rsvd1 = 0;
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objs[1].rsvd2 = 0;
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execbuf.buffers_ptr = (uintptr_t)objs;
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execbuf.buffer_count = 2;
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execbuf.batch_start_offset = 0;
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execbuf.batch_len = size;
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execbuf.cliprects_ptr = 0;
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execbuf.num_cliprects = 0;
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execbuf.DR1 = 0;
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execbuf.DR4 = 0;
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execbuf.flags = I915_EXEC_RENDER;
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i915_execbuffer2_set_context_id(execbuf, 0);
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execbuf.rsvd2 = 0;
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gem_execbuf(fd, &execbuf);
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gem_sync(fd, cmd_bo);
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gem_read(fd,target_bo, 0, &actual_value, sizeof(actual_value));
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igt_assert(expected_value == actual_value);
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gem_close(fd, target_bo);
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return 1;
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}
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uint32_t handle;
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int fd;
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#define GFX_OP_PIPE_CONTROL ((0x3<<29)|(0x3<<27)|(0x2<<24)|2)
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#define PIPE_CONTROL_QW_WRITE (1<<14)
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igt_main
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{
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igt_fixture {
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int parser_version = 0;
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drm_i915_getparam_t gp;
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int rc;
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fd = drm_open_any();
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gp.param = I915_PARAM_CMD_PARSER_VERSION;
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gp.value = &parser_version;
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rc = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
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igt_require(!rc && parser_version > 0);
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handle = gem_create(fd, 4096);
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}
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igt_subtest("basic-allowed") {
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uint32_t pc[] = {
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GFX_OP_PIPE_CONTROL,
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PIPE_CONTROL_QW_WRITE,
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0, // To be patched
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0x12000000,
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0,
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MI_BATCH_BUFFER_END,
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};
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igt_assert(
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exec_batch_patched(fd, handle,
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pc, sizeof(pc),
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8, // patch offset,
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0x12000000));
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}
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igt_fixture {
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gem_close(fd, handle);
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close(fd);
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}
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}
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