mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-11 01:46:14 +00:00
tests: Run igt.cocci
Signed-off-by: Daniel Stone <daniels@collabora.com>
This commit is contained in:
parent
f735015ed3
commit
de7ccdd083
@ -212,7 +212,7 @@ static void test_import_close_race(void)
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else {
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pthread_mutex_lock(&t_data.mutex);
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igt_assert_eq(drm_intel_bo_gem_export_to_prime(bo, &(t_data.prime_fd)), 0);
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igt_assert(t_data.prime_fd != -1);
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igt_assert_neq(t_data.prime_fd, -1);
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pthread_mutex_unlock(&t_data.mutex);
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}
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@ -107,9 +107,7 @@ static int negative_reloc(int fd, unsigned flags)
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execbuf.buffer_count = 2;
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execbuf.batch_len = 8;
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do_or_die(drmIoctl(fd,
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DRM_IOCTL_I915_GEM_EXECBUFFER2,
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&execbuf));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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gem_close(fd, gem_exec[1].handle);
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igt_info("Found offset %lld for 4k batch\n", (long long)gem_exec[0].offset);
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@ -136,9 +134,7 @@ static int negative_reloc(int fd, unsigned flags)
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execbuf.buffer_count = 1;
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execbuf.flags = flags & USE_LUT;
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do_or_die(drmIoctl(fd,
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DRM_IOCTL_I915_GEM_EXECBUFFER2,
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&execbuf));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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igt_info("Batch is now at offset %lld\n", (long long)gem_exec[0].offset);
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@ -298,8 +298,8 @@ gpu_set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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gem_pwrite.offset = 0;
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gem_pwrite.size = execbuf.batch_len;
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gem_pwrite.data_ptr = (uintptr_t)buf;
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite));
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite);
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &create.handle);
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}
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@ -868,7 +868,7 @@ static void bit17_require(void)
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arg.handle = gem_create(fd, 4096);
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gem_set_tiling(fd, arg.handle, I915_TILING_X, 512);
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg);
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gem_close(fd, arg.handle);
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igt_require(arg.phys_swizzle_mode == arg.swizzle_mode);
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}
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@ -116,8 +116,7 @@ static void big_exec(int fd, uint32_t handle, int ring)
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execbuf.buffer_count = 1;
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i915_execbuffer2_set_context_id(execbuf, ctx_id1);
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igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
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&execbuf) == 0);
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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for (i = 0; i < num_buffers; i++) {
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uint32_t tmp_handle = gem_create(fd, 4096);
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@ -141,12 +140,10 @@ static void big_exec(int fd, uint32_t handle, int ring)
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i - 1, num_buffers);
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/* double check that it works */
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igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
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&execbuf) == 0);
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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i915_execbuffer2_set_context_id(execbuf, ctx_id2);
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igt_assert(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
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&execbuf) == 0);
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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gem_sync(fd, handle);
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}
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@ -40,9 +40,9 @@ int32_t ctx;
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#define LOCAL_IOCTL_I915_GEM_CONTEXT_SETPARAM DRM_IOWR (DRM_COMMAND_BASE + LOCAL_I915_GEM_CONTEXT_SETPARAM, struct local_i915_gem_context_param)
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#define TEST_SUCCESS(ioc) \
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igt_assert(drmIoctl(fd, (ioc), &ctx_param) == 0);
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do_ioctl(fd, (ioc), &ctx_param);
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#define TEST_FAIL(ioc, exp_errno) \
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igt_assert(drmIoctl(fd, (ioc), &ctx_param) < 0 && errno == exp_errno);
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do_ioctl_err(fd, (ioc), &ctx_param, exp_errno);
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igt_main
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{
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@ -90,9 +90,7 @@ test_access(int fd)
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/* Check that fd1 can mmap. */
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mmap_arg.handle = handle;
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igt_assert(drmIoctl(fd,
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DRM_IOCTL_I915_GEM_MMAP_GTT,
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&mmap_arg) == 0);
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do_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg);
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igt_assert(mmap64(0, OBJECT_SIZE, PROT_READ | PROT_WRITE,
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MAP_SHARED, fd, mmap_arg.offset));
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@ -122,9 +120,7 @@ test_short(int fd)
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mmap_arg.handle = gem_create(fd, OBJECT_SIZE);
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igt_assert(mmap_arg.handle);
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igt_assert(drmIoctl(fd,
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DRM_IOCTL_I915_GEM_MMAP_GTT,
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&mmap_arg) == 0);
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do_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg);
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for (pages = 1; pages <= OBJECT_SIZE / PAGE_SIZE; pages <<= 1) {
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uint8_t *r, *w;
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@ -80,7 +80,7 @@ static void exec(int fd, uint32_t handle, uint32_t offset)
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i915_execbuffer2_set_context_id(execbuf, 0);
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execbuf.rsvd2 = 0;
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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igt_assert(gem_exec[0].offset == offset);
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}
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@ -172,7 +172,7 @@ static void make_busy(int fd, uint32_t handle)
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gem_write(fd, handle, 0, batch, execbuf.batch_len);
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for (count = 0; count < 10; count++)
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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gem_close(fd, tmp);
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}
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@ -100,7 +100,7 @@ static void copy(int fd, uint32_t src, uint32_t dst, void *buf, int len, int loo
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while (loops--) {
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gem_write(fd, src, 0, buf, len);
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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gem_read(fd, dst, 0, buf, len);
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}
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@ -120,7 +120,7 @@ static void as_gtt_mmap(int fd, uint32_t src, uint32_t dst, void *buf, int len,
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I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
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memcpy(src_ptr, buf, len);
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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gem_set_domain(fd, dst,
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I915_GEM_DOMAIN_GTT, 0);
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memcpy(buf, dst_ptr, len);
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@ -145,7 +145,7 @@ static void as_cpu_mmap(int fd, uint32_t src, uint32_t dst, void *buf, int len,
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I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
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memcpy(src_ptr, buf, len);
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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gem_set_domain(fd, dst,
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I915_GEM_DOMAIN_CPU, 0);
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memcpy(buf, dst_ptr, len);
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@ -167,7 +167,7 @@ static void test_copy(int fd, uint32_t src, uint32_t dst, uint32_t *buf, int len
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gem_write(fd, src, 0, buf, len);
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memset(buf, 0, len);
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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gem_read(fd, dst, 0, buf, len);
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gem_close(fd, exec[2].handle);
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@ -189,7 +189,7 @@ static void test_as_gtt_mmap(int fd, uint32_t src, uint32_t dst, int len)
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for (i = 0; i < len/4; i++)
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src_ptr[i] = i;
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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gem_close(fd, exec[2].handle);
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gem_set_domain(fd, dst, I915_GEM_DOMAIN_GTT, 0);
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@ -213,7 +213,7 @@ static void test_as_cpu_mmap(int fd, uint32_t src, uint32_t dst, int len)
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for (i = 0; i < len/4; i++)
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src_ptr[i] = i;
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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gem_close(fd, exec[2].handle);
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gem_set_domain(fd, dst, I915_GEM_DOMAIN_CPU, 0);
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@ -65,7 +65,7 @@ static bool check_kernel_x86_64(void)
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struct utsname uts;
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ret = uname(&uts);
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igt_assert(ret == 0);
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igt_assert_eq(ret, 0);
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if (!strcmp(uts.machine, "x86_64"))
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return true;
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@ -157,8 +157,8 @@ static void thread_fini(struct thread *t)
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static void check_memory_layout(void)
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{
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if (igt_debugfs_search("i915_swizzle_info", "L-shaped"))
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igt_skip("L-shaped memory configuration detected\n");
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igt_skip_on_f(igt_debugfs_search("i915_swizzle_info", "L-shaped"),
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"L-shaped memory configuration detected\n");
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igt_debug("normal memory configuration detected, continuing\n");
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}
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@ -123,7 +123,7 @@ get_tiling(int fd, uint32_t handle, uint32_t *tiling, uint32_t *swizzle)
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memset(&arg, 0, sizeof(arg));
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arg.handle = handle;
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg);
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igt_require(arg.phys_swizzle_mode == arg.swizzle_mode);
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*tiling = arg.tiling_mode;
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@ -118,7 +118,7 @@ get_tiling(int fd, uint32_t handle, uint32_t *tiling, uint32_t *swizzle)
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memset(&arg, 0, sizeof(arg));
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arg.handle = handle;
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do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg));
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do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg);
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igt_require(arg.phys_swizzle_mode == arg.swizzle_mode);
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*tiling = arg.tiling_mode;
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@ -138,7 +138,7 @@ static void get_method_crc(enum igt_draw_method method, uint32_t drm_format,
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rc = drmModeSetCrtc(drm_fd, ms.crtc_id, fb.fb_id, 0, 0,
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&ms.connector_id, 1, ms.mode);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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igt_pipe_crc_collect_crc(pipe_crc, crc);
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@ -181,7 +181,7 @@ static void get_fill_crc(uint64_t tiling, igt_crc_t *crc)
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rc = drmModeSetCrtc(drm_fd, ms.crtc_id, fb.fb_id, 0, 0,
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&ms.connector_id, 1, ms.mode);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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igt_pipe_crc_collect_crc(pipe_crc, crc);
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@ -207,7 +207,7 @@ static void fill_fb_subtest(void)
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rc = drmModeSetCrtc(drm_fd, ms.crtc_id, fb.fb_id, 0, 0,
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&ms.connector_id, 1, ms.mode);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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igt_pipe_crc_collect_crc(pipe_crc, &base_crc);
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@ -717,7 +717,7 @@ static void fbc_print_status(void)
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char buf[128];
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igt_debugfs_read("i915_fbc_status", buf);
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printf("FBC status:\n%s\n", buf);
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igt_info("FBC status:\n%s\n", buf);
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}
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static bool psr_is_enabled(void)
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@ -734,7 +734,7 @@ static void psr_print_status(void)
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char buf[256];
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igt_debugfs_read("i915_edp_psr_status", buf);
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printf("PSR status:\n%s\n", buf);
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igt_info("PSR status:\n%s\n", buf);
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}
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static struct timespec fbc_get_last_action(void)
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@ -988,7 +988,7 @@ static struct rect pat4_get_rect(struct fb_region *fb, int r)
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{
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struct rect rect;
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igt_assert(r == 0);
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igt_assert_eq(r, 0);
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rect.x = 0;
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rect.y = 0;
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@ -1058,16 +1058,16 @@ static void unset_all_crtcs(void)
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for (i = 0; i < drm.res->count_crtcs; i++) {
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rc = drmModeSetCrtc(drm.fd, drm.res->crtcs[i], -1, 0, 0, NULL,
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0, NULL);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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rc = drmModeSetCursor(drm.fd, drm.res->crtcs[i], 0, 0, 0);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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}
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for (i = 0; i < drm.plane_res->count_planes; i++) {
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rc = drmModeSetPlane(drm.fd, drm.plane_res->planes[i], 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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}
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}
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@ -1119,7 +1119,7 @@ static void start_busy_thread(struct igt_fb *fb)
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busy_thread.bpp = fb_get_bpp(fb);
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rc = pthread_create(&busy_thread.thread, NULL, busy_thread_func, NULL);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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}
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static void stop_busy_thread(void)
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@ -1172,7 +1172,7 @@ static void init_blue_crc(enum pixel_format format)
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rc = drmModeSetCrtc(drm.fd, prim_mode_params.crtc_id,
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blue.fb_id, 0, 0, &prim_mode_params.connector_id, 1,
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prim_mode_params.mode);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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collect_crcs(&blue_crcs[format].crc);
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print_crc("Blue CRC: ", &blue_crcs[format].crc);
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@ -1220,7 +1220,7 @@ static void init_crcs(enum pixel_format format,
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tmp_fbs[r].fb_id, 0, 0,
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&prim_mode_params.connector_id, 1,
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prim_mode_params.mode);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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collect_crcs(&pattern->crcs[format][r]);
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}
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@ -1336,7 +1336,7 @@ static void setup_sink_crc(void)
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set_mode_for_params(&prim_mode_params);
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sink_crc.fd = igt_debugfs_open("i915_sink_crc_eDP1", O_RDONLY);
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igt_assert(sink_crc.fd >= 0);
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igt_assert_lte(0, sink_crc.fd);
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rc = read(sink_crc.fd, crc.data, SINK_CRC_SIZE);
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errno_ = errno;
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@ -1672,13 +1672,13 @@ static void set_cursor_for_test(const struct test_mode *t,
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fill_fb_region(¶ms->cursor, COLOR_PRIM_BG);
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rc = drmModeMoveCursor(drm.fd, params->crtc_id, 0, 0);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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rc = drmModeSetCursor(drm.fd, params->crtc_id,
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params->cursor.fb->gem_handle,
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params->cursor.w,
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params->cursor.h);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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do_assertions(ASSERT_NO_ACTION_CHANGE);
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}
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@ -1695,7 +1695,7 @@ static void set_sprite_for_test(const struct test_mode *t,
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params->sprite.w, params->sprite.h,
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0, 0, params->sprite.w << 16,
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params->sprite.h << 16);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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do_assertions(ASSERT_NO_ACTION_CHANGE);
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}
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@ -2170,7 +2170,7 @@ static void wait_flip_event(void)
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break;
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case 1:
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rc = drmHandleEvent(drm.fd, &evctx);
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igt_assert(rc == 0);
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igt_assert_eq(rc, 0);
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break;
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default:
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igt_assert_f(false, "Unexpected poll rc %d\n", rc);
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@ -2187,13 +2187,13 @@ static void page_flip_for_params(struct modeset_params *params,
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case FLIP_PAGEFLIP:
|
||||
rc = drmModePageFlip(drm.fd, params->crtc_id,
|
||||
params->fb.fb->fb_id, 0, NULL);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
break;
|
||||
case FLIP_PAGEFLIP_EVENT:
|
||||
rc = drmModePageFlip(drm.fd, params->crtc_id,
|
||||
params->fb.fb->fb_id,
|
||||
DRM_MODE_PAGE_FLIP_EVENT, NULL);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
wait_flip_event();
|
||||
break;
|
||||
case FLIP_MODESET:
|
||||
@ -2349,7 +2349,7 @@ static void move_subtest(const struct test_mode *t)
|
||||
case PLANE_CUR:
|
||||
rc = drmModeMoveCursor(drm.fd, params->crtc_id, rect.x,
|
||||
rect.y);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
break;
|
||||
case PLANE_SPR:
|
||||
rc = drmModeSetPlane(drm.fd, params->sprite_id,
|
||||
@ -2358,7 +2358,7 @@ static void move_subtest(const struct test_mode *t)
|
||||
rect.x, rect.y, rect.w,
|
||||
rect.h, 0, 0, rect.w << 16,
|
||||
rect.h << 16);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
break;
|
||||
default:
|
||||
igt_assert(false);
|
||||
@ -2410,13 +2410,13 @@ static void onoff_subtest(const struct test_mode *t)
|
||||
case PLANE_CUR:
|
||||
rc = drmModeSetCursor(drm.fd, params->crtc_id,
|
||||
0, 0, 0);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
break;
|
||||
case PLANE_SPR:
|
||||
rc = drmModeSetPlane(drm.fd, params->sprite_id,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
break;
|
||||
default:
|
||||
igt_assert(false);
|
||||
@ -2430,7 +2430,7 @@ static void onoff_subtest(const struct test_mode *t)
|
||||
params->cursor.fb->gem_handle,
|
||||
params->cursor.w,
|
||||
params->cursor.h);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
break;
|
||||
case PLANE_SPR:
|
||||
rc = drmModeSetPlane(drm.fd, params->sprite_id,
|
||||
@ -2441,7 +2441,7 @@ static void onoff_subtest(const struct test_mode *t)
|
||||
0,
|
||||
params->sprite.w << 16,
|
||||
params->sprite.h << 16);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
break;
|
||||
default:
|
||||
igt_assert(false);
|
||||
@ -2471,7 +2471,7 @@ static bool prim_plane_disabled(void)
|
||||
igt_assert(found);
|
||||
|
||||
rc = drmSetClientCap(drm.fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 0);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
|
||||
return disabled;
|
||||
}
|
||||
@ -2513,7 +2513,7 @@ static void fullscreen_plane_subtest(const struct test_mode *t)
|
||||
fullscreen_fb.height, 0, 0,
|
||||
fullscreen_fb.width << 16,
|
||||
fullscreen_fb.height << 16);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
update_wanted_crc(t, &pattern->crcs[t->format][0]);
|
||||
|
||||
switch (t->screen) {
|
||||
@ -2533,7 +2533,7 @@ static void fullscreen_plane_subtest(const struct test_mode *t)
|
||||
|
||||
rc = drmModeSetPlane(drm.fd, params->sprite_id, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
|
||||
if (t->screen == SCREEN_PRIM)
|
||||
assertions = ASSERT_LAST_ACTION_CHANGED;
|
||||
@ -2817,15 +2817,15 @@ static void try_invalid_strides(void)
|
||||
|
||||
/* Smaller than 512, yet still 64-byte aligned. */
|
||||
rc = __gem_set_tiling(drm.fd, gem_handle, I915_TILING_X, 448);
|
||||
igt_assert(rc == -EINVAL);
|
||||
igt_assert_eq(rc, -EINVAL);
|
||||
|
||||
/* Bigger than 512, but not 64-byte aligned. */
|
||||
rc = __gem_set_tiling(drm.fd, gem_handle, I915_TILING_X, 1022);
|
||||
igt_assert(rc == -EINVAL);
|
||||
igt_assert_eq(rc, -EINVAL);
|
||||
|
||||
/* Just make sure something actually works. */
|
||||
rc = __gem_set_tiling(drm.fd, gem_handle, I915_TILING_X, 1024);
|
||||
igt_assert(rc == 0);
|
||||
igt_assert_eq(rc, 0);
|
||||
|
||||
gem_close(drm.fd, gem_handle);
|
||||
}
|
||||
@ -2950,11 +2950,11 @@ static int opt_handler(int option, int option_index, void *data)
|
||||
igt_assert(errno == 0);
|
||||
break;
|
||||
case '1':
|
||||
igt_assert(opt.only_pipes == PIPE_COUNT);
|
||||
igt_assert_eq(opt.only_pipes, PIPE_COUNT);
|
||||
opt.only_pipes = PIPE_SINGLE;
|
||||
break;
|
||||
case '2':
|
||||
igt_assert(opt.only_pipes == PIPE_COUNT);
|
||||
igt_assert_eq(opt.only_pipes, PIPE_COUNT);
|
||||
opt.only_pipes = PIPE_DUAL;
|
||||
break;
|
||||
default:
|
||||
|
@ -122,7 +122,7 @@ static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe,
|
||||
&output->id,
|
||||
1,
|
||||
mode);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
} else {
|
||||
igt_display_commit2(display, s);
|
||||
}
|
||||
|
@ -94,7 +94,7 @@ set_mode_on_pipe(data_t *data, enum pipe pipe, igt_output_t *output)
|
||||
mode->hdisplay, mode->vdisplay,
|
||||
DRM_FORMAT_XRGB8888, I915_TILING_NONE,
|
||||
1.0, 1.0, 1.0, &fb);
|
||||
igt_assert(fb_id >= 0);
|
||||
igt_assert_lte(0, fb_id);
|
||||
|
||||
igt_plane_set_fb(primary, &fb);
|
||||
return igt_display_try_commit2(&data->display, COMMIT_LEGACY);
|
||||
@ -150,12 +150,12 @@ test_dpms(data_t *data)
|
||||
kmstest_pipe_name(PIPE_C), igt_output_name(output2));
|
||||
|
||||
ret = set_big_mode_on_pipe(data, PIPE_B, output1);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
|
||||
kmstest_set_connector_dpms(data->drm_fd, output1->config.connector, DRM_MODE_DPMS_OFF);
|
||||
|
||||
ret = set_big_mode_on_pipe(data, PIPE_C, output2);
|
||||
igt_assert(ret != 0);
|
||||
igt_assert_neq(ret, 0);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -172,13 +172,13 @@ test_lane_reduction(data_t *data)
|
||||
kmstest_pipe_name(PIPE_C), igt_output_name(output2));
|
||||
|
||||
ret = set_big_mode_on_pipe(data, PIPE_B, output1);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
|
||||
ret = set_normal_mode_on_pipe(data, PIPE_B, output1);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
|
||||
ret = set_normal_mode_on_pipe(data, PIPE_C, output2);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -195,16 +195,16 @@ test_disable_pipe_B(data_t *data)
|
||||
kmstest_pipe_name(PIPE_C), igt_output_name(output2));
|
||||
|
||||
ret = set_big_mode_on_pipe(data, PIPE_B, output1);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
|
||||
ret = disable_pipe(data, PIPE_B, output1);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
|
||||
ret = set_normal_mode_on_pipe(data, PIPE_C, output2);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
|
||||
ret = set_normal_mode_on_pipe(data, PIPE_B, output1);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -221,13 +221,13 @@ test_from_C_to_B_with_3_lanes(data_t *data)
|
||||
kmstest_pipe_name(PIPE_C), igt_output_name(output2));
|
||||
|
||||
ret = set_normal_mode_on_pipe(data, PIPE_C, output2);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
|
||||
ret = disable_pipe(data, PIPE_C, output2);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
|
||||
ret = set_big_mode_on_pipe(data, PIPE_B, output1);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -244,10 +244,10 @@ test_fail_enable_pipe_C_while_B_has_3_lanes(data_t *data)
|
||||
kmstest_pipe_name(PIPE_C), igt_output_name(output2));
|
||||
|
||||
ret = set_big_mode_on_pipe(data, PIPE_B, output1);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
|
||||
ret = set_normal_mode_on_pipe(data, PIPE_C, output2);
|
||||
igt_assert(ret != 0);
|
||||
igt_assert_neq(ret, 0);
|
||||
}
|
||||
|
||||
static data_t data;
|
||||
|
@ -124,7 +124,7 @@ static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe,
|
||||
&output->id,
|
||||
1,
|
||||
mode);
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
} else {
|
||||
igt_display_commit2(display, s);
|
||||
}
|
||||
|
@ -268,9 +268,9 @@ static void test_plane_rotation(data_t *data, enum igt_plane plane_type)
|
||||
igt_plane_set_rotation(plane, data->rotation);
|
||||
ret = igt_display_try_commit2(display, commit);
|
||||
if (data->override_fmt || data->override_tiling) {
|
||||
igt_assert(ret == -EINVAL);
|
||||
igt_assert_eq(ret, -EINVAL);
|
||||
} else {
|
||||
igt_assert(ret == 0);
|
||||
igt_assert_eq(ret, 0);
|
||||
igt_pipe_crc_collect_crc(data->pipe_crc,
|
||||
&crc_output);
|
||||
igt_assert_crc_equal(&data->ref_crc,
|
||||
|
@ -95,12 +95,12 @@ static void test_and_verify(int val)
|
||||
{
|
||||
int result;
|
||||
|
||||
igt_assert(backlight_write(val, "brightness") == 0);
|
||||
igt_assert(backlight_read(&result, "brightness") == 0);
|
||||
igt_assert_eq(backlight_write(val, "brightness"), 0);
|
||||
igt_assert_eq(backlight_read(&result, "brightness"), 0);
|
||||
/* Check that the exact value sticks */
|
||||
igt_assert(result == val);
|
||||
igt_assert_eq(result, val);
|
||||
|
||||
igt_assert(backlight_read(&result, "actual_brightness") == 0);
|
||||
igt_assert_eq(backlight_read(&result, "actual_brightness"), 0);
|
||||
/* Some rounding may happen depending on hw. Just check that it's close enough. */
|
||||
igt_assert(result <= val + val * TOLERANCE / 100 && result >= val - val * TOLERANCE / 100);
|
||||
}
|
||||
@ -118,15 +118,15 @@ static void test_bad_brightness(int max)
|
||||
/* First write some sane value */
|
||||
backlight_write(max / 2, "brightness");
|
||||
/* Writing invalid values should fail and not change the value */
|
||||
igt_assert(backlight_write(-1, "brightness") < 0);
|
||||
igt_assert_lt(backlight_write(-1, "brightness"), 0);
|
||||
backlight_read(&val, "brightness");
|
||||
igt_assert(val == max / 2);
|
||||
igt_assert(backlight_write(max + 1, "brightness") < 0);
|
||||
igt_assert_eq(val, max / 2);
|
||||
igt_assert_lt(backlight_write(max + 1, "brightness"), 0);
|
||||
backlight_read(&val, "brightness");
|
||||
igt_assert(val == max / 2);
|
||||
igt_assert(backlight_write(INT_MAX, "brightness") < 0);
|
||||
igt_assert_eq(val, max / 2);
|
||||
igt_assert_lt(backlight_write(INT_MAX, "brightness"), 0);
|
||||
backlight_read(&val, "brightness");
|
||||
igt_assert(val == max / 2);
|
||||
igt_assert_eq(val, max / 2);
|
||||
}
|
||||
|
||||
static void test_fade(int max)
|
||||
|
Loading…
x
Reference in New Issue
Block a user