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kms_pipe_crc_basic: Split the main test function a bit more

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Let's put the per-output test in its own function to get rid of 1 level
of indentation. We'll need it to cycle through 2 different framebuffers
to make sure we compute different CRCs if the fbs are different.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau 2014-05-28 17:33:32 +01:00
parent c8b8f8abf6
commit dbb80a63b4
1 changed files with 62 additions and 53 deletions
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115
tests/kms_pipe_crc_basic.c
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@ -105,76 +105,85 @@ static void test_bad_command(data_t *data, const char *cmd)
#define TEST_SEQUENCE (1<<0)
static int
test_read_crc_for_output(data_t *data, int pipe, igt_output_t *output,
unsigned flags)
{
igt_display_t *display = &data->display;
igt_plane_t *primary;
drmModeModeInfo *mode;
igt_pipe_crc_t *pipe_crc;
igt_crc_t *crcs = NULL;
igt_output_set_pipe(output, pipe);
mode = igt_output_get_mode(output);
igt_create_color_fb(data->drm_fd,
mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
false, /* tiled */
0.0, 1.0, 0.0,
&data->fb);
primary = igt_output_get_plane(output, 0);
igt_plane_set_fb(primary, &data->fb);
igt_display_commit(display);
pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
if (!pipe_crc)
return 0;
igt_pipe_crc_start(pipe_crc);
/* wait for 3 vblanks and the corresponding 3 CRCs */
igt_pipe_crc_get_crcs(pipe_crc, 3, &crcs);
igt_pipe_crc_stop(pipe_crc);
/* ensure the CRCs are not all 0s */
igt_assert(!igt_crc_is_null(&crcs[0]));
igt_assert(!igt_crc_is_null(&crcs[1]));
igt_assert(!igt_crc_is_null(&crcs[2]));
/* and ensure that they'are all equal, we haven't changed the fb */
igt_assert(igt_crc_equal(&crcs[0], &crcs[1]));
igt_assert(igt_crc_equal(&crcs[1], &crcs[2]));
if (flags & TEST_SEQUENCE) {
igt_assert(crcs[0].frame + 1 == crcs[1].frame);
igt_assert(crcs[1].frame + 1 == crcs[2].frame);
}
free(crcs);
igt_pipe_crc_free(pipe_crc);
igt_remove_fb(data->drm_fd, &data->fb);
igt_plane_set_fb(primary, NULL);
igt_output_set_pipe(output, PIPE_ANY);
return 1;
}
static void test_read_crc(data_t *data, int pipe, unsigned flags)
{
igt_display_t *display = &data->display;
igt_pipe_crc_t *pipe_crc;
igt_crc_t *crcs = NULL;
int valid_connectors = 0;
igt_output_t *output;
igt_skip_on(pipe >= data->display.n_pipes);
for_each_connected_output(display, output) {
igt_plane_t *primary;
drmModeModeInfo *mode;
igt_output_set_pipe(output, pipe);
igt_info("%s: Testing connector %s using pipe %c\n",
igt_subtest_name(), igt_output_name(output),
pipe_name(pipe));
mode = igt_output_get_mode(output);
igt_create_color_fb(data->drm_fd,
mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
false, /* tiled */
0.0, 1.0, 0.0,
&data->fb);
primary = igt_output_get_plane(output, 0);
igt_plane_set_fb(primary, &data->fb);
igt_display_commit(display);
pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
if (!pipe_crc)
continue;
valid_connectors++;
igt_pipe_crc_start(pipe_crc);
/* wait for 3 vblanks and the corresponding 3 CRCs */
igt_pipe_crc_get_crcs(pipe_crc, 3, &crcs);
igt_pipe_crc_stop(pipe_crc);
/* ensure the CRCs are not all 0s */
igt_assert(!igt_crc_is_null(&crcs[0]));
igt_assert(!igt_crc_is_null(&crcs[1]));
igt_assert(!igt_crc_is_null(&crcs[2]));
/* and ensure that they'are all equal, we haven't changed the fb */
igt_assert(igt_crc_equal(&crcs[0], &crcs[1]));
igt_assert(igt_crc_equal(&crcs[1], &crcs[2]));
if (flags & TEST_SEQUENCE) {
igt_assert(crcs[0].frame + 1 == crcs[1].frame);
igt_assert(crcs[1].frame + 1 == crcs[2].frame);
}
free(crcs);
igt_pipe_crc_free(pipe_crc);
igt_remove_fb(data->drm_fd, &data->fb);
igt_plane_set_fb(primary, NULL);
igt_output_set_pipe(output, PIPE_ANY);
valid_connectors += test_read_crc_for_output(data, pipe, output, flags);
}
igt_require_f(valid_connectors, "No connector found for pipe %i\n", pipe);
}
data_t data = {0, };