flywithu/ntel-gpu-tools
1
0
Fork 0
mirror of https://github.com/tiagovignatti/intel-gpu-tools.git synced 2025-06-08 16:36:14 +00:00
Code Issues Releases Wiki Activity

assembler: Make struct declared_register use struct brw_reg

Browse Source 
It's time to start converting the emission code in gram.y to use libbrw
infrastructure. Let's start with using brw_reg for declared register.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau 2013-01-23 15:13:55 +00:00
parent 6b56804757
commit cce4fc2c36
2 changed files with 26 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
assembler/gen4asm.h
View File

@ -33,6 +33,8 @@
#include <stdbool.h> #include <stdbool.h>
#include <assert.h> #include <assert.h>
#include "brw_reg.h"
typedef unsigned char GLubyte; typedef unsigned char GLubyte;
typedef short GLshort; typedef short GLshort;
typedef unsigned int GLuint; typedef unsigned int GLuint;
@ -226,7 +228,7 @@ extern struct program_defaults program_defaults;
struct declared_register { struct declared_register {
char *name; char *name;
struct direct_reg base; struct brw_reg reg;
int element_size; int element_size;
struct region src_region; struct region src_region;
int dst_region; int dst_region;

46
assembler/gram.y
View File

@ -353,9 +353,9 @@ declare_pragma: DECLARE_PRAGMA STRING declare_base declare_elementsize declare_s
reg = calloc(sizeof(struct declared_register), 1); reg = calloc(sizeof(struct declared_register), 1);
reg->name = $2; reg->name = $2;
} }
reg->base.reg_file = $3.reg_file; reg->reg.file = $3.reg_file;
reg->base.reg_nr = $3.reg_nr; reg->reg.nr = $3.reg_nr;
reg->base.subreg_nr = $3.subreg_nr; reg->reg.subnr = $3.subreg_nr;
reg->element_size = $4; reg->element_size = $4;
reg->src_region = $5; reg->src_region = $5;
reg->dst_region = $6; reg->dst_region = $6;
@ -1548,9 +1548,9 @@ dst: dstoperand | dstoperandex
dstoperand: symbol_reg dstregion dstoperand: symbol_reg dstregion
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.reg_file = $1.base.reg_file; $$.reg_file = $1.reg.file;
$$.reg_nr = $1.base.reg_nr; $$.reg_nr = $1.reg.nr;
$$.subreg_nr = $1.base.subreg_nr; $$.subreg_nr = $1.reg.subnr;
if ($2 == DEFAULT_DSTREGION) { if ($2 == DEFAULT_DSTREGION) {
$$.horiz_stride = $1.dst_region; $$.horiz_stride = $1.dst_region;
} else { } else {
@ -1657,7 +1657,7 @@ symbol_reg_p: STRING LPAREN exp RPAREN
} }
memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); memcpy(&$$, dcl_reg, sizeof(*dcl_reg));
$$.base.reg_nr += $3; $$.reg.nr += $3;
free($1); free($1);
} }
| STRING LPAREN exp COMMA exp RPAREN | STRING LPAREN exp COMMA exp RPAREN
@ -1670,15 +1670,15 @@ symbol_reg_p: STRING LPAREN exp RPAREN
} }
memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); memcpy(&$$, dcl_reg, sizeof(*dcl_reg));
$$.base.reg_nr += $3; $$.reg.nr += $3;
$$.base.subreg_nr += $5;
if(advanced_flag) { if(advanced_flag) {
$$.base.reg_nr += $$.base.subreg_nr / (32 / get_type_size(dcl_reg->type)); int size = get_type_size(dcl_reg->type);
$$.base.subreg_nr = $$.base.subreg_nr % (32 / get_type_size(dcl_reg->type)); $$.reg.nr += ($$.reg.subnr + $5) / (32 / size);
$$.reg.subnr = ($$.reg.subnr + $5) % (32 / size);
} else { } else {
$$.base.reg_nr += $$.base.subreg_nr / 32; $$.reg.nr += ($$.reg.subnr + $5) / 32;
$$.base.subreg_nr = $$.base.subreg_nr % 32; $$.reg.subnr = ($$.reg.subnr + $5) % 32;
} }
free($1); free($1);
} }
; ;
@ -1857,9 +1857,9 @@ srcarchoperandex_typed: flagreg | addrreg | maskreg
sendleadreg: symbol_reg sendleadreg: symbol_reg
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.reg_file = $1.base.reg_file; $$.reg_file = $1.reg.file;
$$.reg_nr = $1.base.reg_nr; $$.reg_nr = $1.reg.nr;
$$.subreg_nr = $1.base.subreg_nr; $$.subreg_nr = $1.reg.subnr;
} }
| directgenreg | directmsgreg | directgenreg | directmsgreg
; ;
@ -1871,9 +1871,9 @@ directsrcoperand: negate abs symbol_reg region regtype
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.address_mode = BRW_ADDRESS_DIRECT; $$.address_mode = BRW_ADDRESS_DIRECT;
$$.reg_file = $3.base.reg_file; $$.reg_file = $3.reg.file;
$$.reg_nr = $3.base.reg_nr; $$.reg_nr = $3.reg.nr;
$$.subreg_nr = $3.base.subreg_nr; $$.subreg_nr = $3.reg.subnr;
if ($5.is_default) { if ($5.is_default) {
$$.reg_type = $3.type; $$.reg_type = $3.type;
} else { } else {
@ -2303,9 +2303,9 @@ relativelocation2:
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.address_mode = BRW_ADDRESS_DIRECT; $$.address_mode = BRW_ADDRESS_DIRECT;
$$.reg_file = $1.base.reg_file; $$.reg_file = $1.reg.file;
$$.reg_nr = $1.base.reg_nr; $$.reg_nr = $1.reg.nr;
$$.subreg_nr = $1.base.subreg_nr; $$.subreg_nr = $1.reg.subnr;
$$.reg_type = $1.type; $$.reg_type = $1.type;
$$.vert_stride = $1.src_region.vert_stride; $$.vert_stride = $1.src_region.vert_stride;
$$.width = $1.src_region.width; $$.width = $1.src_region.width;