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assembler: Rename branch to branch_gen6

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The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau 2013-01-16 01:19:29 +00:00
parent 0fde3ddccc
commit cb425d6d20
2 changed files with 13 additions and 6 deletions
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17
assembler/brw_structs.h
View File

@ -1125,6 +1125,18 @@ struct brw_instruction
GLuint dest_address_mode:1; GLuint dest_address_mode:1;
} ia16; /* indirect align16 */ } ia16; /* indirect align16 */
struct {
GLuint dest_reg_file:2;
GLuint dest_reg_type:3;
GLuint src0_reg_file:2;
GLuint src0_reg_type:3;
GLuint src1_reg_file:2;
GLuint src1_reg_type:3;
GLuint pad:1;
GLint jump_count:16;
} branch_gen6;
struct struct
{ {
GLuint dest_reg_file:1; /* used in Gen6, deleted in Gen7 */ GLuint dest_reg_file:1; /* used in Gen6, deleted in Gen7 */
@ -1144,11 +1156,6 @@ struct brw_instruction
GLuint dest_reg_nr:8; GLuint dest_reg_nr:8;
} da3src; } da3src;
struct
{
GLuint pad:16;
GLint JIP:16;
} branch; /* conditional branch JIP for Gen6 only */
} bits1; } bits1;

2
assembler/main.c
View File

@ -448,7 +448,7 @@ int main(int argc, char **argv)
if(opcode == BRW_OPCODE_CALL || opcode == BRW_OPCODE_JMPI) if(opcode == BRW_OPCODE_CALL || opcode == BRW_OPCODE_JMPI)
entry->instruction.bits3.JIP = offset; // for CALL, JMPI entry->instruction.bits3.JIP = offset; // for CALL, JMPI
else else
entry->instruction.bits1.branch.JIP = offset; // for CASE,ELSE,FORK,IF,WHILE entry->instruction.bits1.branch_gen6.jump_count = offset; // for CASE,ELSE,FORK,IF,WHILE
} else if(IS_GENp(7)) { } else if(IS_GENp(7)) {
int opcode = entry->instruction.header.opcode; int opcode = entry->instruction.header.opcode;
/* Gen7 JMPI Restrictions in bspec: /* Gen7 JMPI Restrictions in bspec: