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assembler: Rename branch to branch_gen6
The purpose of this commit is to synchronize opcode definitions across the gen4asm assembler and mesa. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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@ -1125,6 +1125,18 @@ struct brw_instruction
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GLuint dest_address_mode:1;
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} ia16; /* indirect align16 */
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struct {
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GLuint dest_reg_file:2;
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GLuint dest_reg_type:3;
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GLuint src0_reg_file:2;
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GLuint src0_reg_type:3;
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GLuint src1_reg_file:2;
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GLuint src1_reg_type:3;
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GLuint pad:1;
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GLint jump_count:16;
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} branch_gen6;
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struct
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{
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GLuint dest_reg_file:1; /* used in Gen6, deleted in Gen7 */
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@ -1144,11 +1156,6 @@ struct brw_instruction
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GLuint dest_reg_nr:8;
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} da3src;
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struct
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{
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GLuint pad:16;
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GLint JIP:16;
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} branch; /* conditional branch JIP for Gen6 only */
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} bits1;
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@ -448,7 +448,7 @@ int main(int argc, char **argv)
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if(opcode == BRW_OPCODE_CALL || opcode == BRW_OPCODE_JMPI)
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entry->instruction.bits3.JIP = offset; // for CALL, JMPI
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else
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entry->instruction.bits1.branch.JIP = offset; // for CASE,ELSE,FORK,IF,WHILE
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entry->instruction.bits1.branch_gen6.jump_count = offset; // for CASE,ELSE,FORK,IF,WHILE
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} else if(IS_GENp(7)) {
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int opcode = entry->instruction.header.opcode;
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/* Gen7 JMPI Restrictions in bspec:
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