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https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-07-23 18:06:18 +00:00
Fix Gen6 ELSE instructions code logic according to bspec.
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@ -1139,6 +1139,12 @@ struct brw_instruction
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GLuint dest_subreg_nr:3;
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GLuint dest_reg_nr:8;
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} three_src_gen6; /* Three-source-operator instructions for Gen6+ */
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struct
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{
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GLuint pad:16;
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GLint JIP:16;
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} branch; /* conditional branch JIP for Gen6 only */
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} bits1;
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@ -1309,12 +1315,11 @@ struct brw_instruction
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struct
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{
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GLint JIP:16; /* bspec: both the JIP and UIP are signed 16-bit numbers */
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GLint JIP:16; /* Gen7 bspec: both the JIP and UIP are signed 16-bit numbers */
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GLint UIP:16;
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} branch_2_offset; /* for Gen6, Gen7 2-offsets branch instructions */
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} branch_2_offset; /* for Gen6, Gen7 2-offsets branch; for Gen7 1-offset branch */
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GLint JIP; /* for Gen6, Gen7 1-offset branch instructions
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Gen6 uses low 25 bits. Gen7 uses low 16 bits. */
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GLint JIP; /* used by Gen6 CALL instructions */
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struct {
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GLuint function:4;
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@ -450,8 +450,8 @@ ifelseinstruction: ENDIF
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}
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| ELSE execsize relativelocation instoptions
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{
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// for Gen4, Gen5
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if(gen_level <= 5) {
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// for Gen4, Gen5
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/* Set the istack pop count, which must always be 1. */
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$3.imm32 |= (1 << 16);
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@ -464,7 +464,7 @@ ifelseinstruction: ENDIF
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set_instruction_src1(&$$, &$3);
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$$.first_reloc_target = $3.reloc_target;
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$$.first_reloc_offset = $3.imm32;
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} else if(gen_level == 7) { // TODO: Gen5 Gen6 also OK?
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} else if(gen_level <= 7) {
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memset(&$$, 0, sizeof($$));
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$$.header.opcode = $1;
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$$.header.execution_size = $2;
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@ -640,7 +640,7 @@ subroutineinstruction:
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set_instruction_predicate(&$$, &$1);
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$$.header.opcode = $2;
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$$.header.execution_size = 1; /* execution size of RET should be 2 */
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set_instruction_dest(&$$, dst_null_reg);
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set_instruction_dest(&$$, &dst_null_reg);
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$5.reg_type = BRW_REGISTER_TYPE_D;
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$5.horiz_stride = 1; /*encoded 1*/
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$5.width = 1; /*encoded 2*/
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@ -417,9 +417,16 @@ int main(int argc, char **argv)
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/* bspec: Unlike other flow control instructions, the offset used by JMPI is relative to the incremented instruction pointer rather than the IP value for the instruction itself. */
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if(entry->instruction.header.opcode == BRW_OPCODE_JMPI)
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offset --;
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entry->instruction.bits3.JIP = jump_distance(offset);
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if(entry->instruction.header.opcode == BRW_OPCODE_ELSE)
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entry->instruction.bits3.branch_2_offset.UIP = 1;
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offset = jump_distance(offset);
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if(gen_level <= 5 && entry->instruction.header.opcode == BRW_OPCODE_ELSE)
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entry->instruction.bits3.branch_2_offset.UIP = 1; /* Set the istack pop count, which must always be 1. */
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else if(gen_level == 6) {
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/* TODO: position of JIP for endif is not written down in Gen6 spec, may be bits1 */
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entry->instruction.bits1.branch.JIP = offset; // for CASE,ELSE,FORK,IF,WHILE
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entry->instruction.bits3.JIP = offset; // for CALL
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} else if(gen_level >= 7)
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entry->instruction.bits3.branch_2_offset.JIP = offset;
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}
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}
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