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intel_batchbuffer: add support for non-32bit blt copies
Needed by an upcoming patch fixing kms_render's blits for fbs that have other than 32bpp formats. Based on the corresponding SNA function. v2: - fix random ordering of src, dst parameters (Chris) - pass pitch in bytes rather than pixels (Chris) Signed-off-by: Imre Deak <imre.deak@intel.com>
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@ -191,44 +191,78 @@ intel_batchbuffer_data(struct intel_batchbuffer *batch,
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}
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void
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void
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intel_copy_bo(struct intel_batchbuffer *batch,
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intel_blt_copy(struct intel_batchbuffer *batch,
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drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
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drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch,
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int width, int height)
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drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch,
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int width, int height, int bpp)
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{
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{
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uint32_t src_tiling, dst_tiling, swizzle;
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uint32_t src_tiling, dst_tiling, swizzle;
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uint32_t src_pitch, dst_pitch;
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uint32_t cmd_bits = 0;
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uint32_t cmd_bits = 0;
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uint32_t br13_bits;
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drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
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drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
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drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
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drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
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src_pitch = width * 4;
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src_pitch = src_pitch;
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if (IS_965(batch->devid) && src_tiling != I915_TILING_NONE) {
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if (IS_965(batch->devid) && src_tiling != I915_TILING_NONE) {
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src_pitch /= 4;
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src_pitch /= 4;
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cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
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cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
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}
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}
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dst_pitch = width * 4;
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dst_pitch = dst_pitch;
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if (IS_965(batch->devid) && dst_tiling != I915_TILING_NONE) {
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if (IS_965(batch->devid) && dst_tiling != I915_TILING_NONE) {
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dst_pitch /= 4;
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dst_pitch /= 4;
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cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
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cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
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}
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}
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br13_bits = 0;
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switch (bpp) {
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case 8:
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break;
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case 16: /* supporting only RGB565, not ARGB1555 */
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br13_bits |= 1 << 24;
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break;
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case 32:
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br13_bits |= 3 << 24;
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cmd_bits |= XY_SRC_COPY_BLT_WRITE_ALPHA |
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XY_SRC_COPY_BLT_WRITE_RGB;
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break;
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default:
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abort();
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}
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#define CHECK_RANGE(x) ((x) >= 0 && (x) < (1 << 15))
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assert(CHECK_RANGE(src_x1) && CHECK_RANGE(src_y1) &&
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CHECK_RANGE(dst_x1) && CHECK_RANGE(dst_y1) &&
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CHECK_RANGE(width) && CHECK_RANGE(height) &&
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CHECK_RANGE(src_x1 + width) && CHECK_RANGE(src_y1 + height) &&
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CHECK_RANGE(dst_x1 + width) && CHECK_RANGE(dst_y1 + height) &&
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CHECK_RANGE(src_pitch) && CHECK_RANGE(dst_pitch));
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#undef CHECK_RANGE
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BEGIN_BATCH(8);
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BEGIN_BATCH(8);
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OUT_BATCH(XY_SRC_COPY_BLT_CMD |
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OUT_BATCH(XY_SRC_COPY_BLT_CMD | cmd_bits);
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XY_SRC_COPY_BLT_WRITE_ALPHA |
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OUT_BATCH((br13_bits) |
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XY_SRC_COPY_BLT_WRITE_RGB |
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cmd_bits);
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OUT_BATCH((3 << 24) | /* 32 bits */
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(0xcc << 16) | /* copy ROP */
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(0xcc << 16) | /* copy ROP */
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dst_pitch);
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dst_pitch);
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OUT_BATCH(0); /* dst x1,y1 */
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OUT_BATCH((dst_y1 << 16) | dst_x1); /* dst x1,y1 */
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OUT_BATCH((height << 16) | width); /* dst x2,y2 */
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OUT_BATCH(((dst_y1 + height) << 16) | (dst_x1 + width)); /* dst x2,y2 */
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OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
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OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
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OUT_BATCH(0); /* src x1,y1 */
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OUT_BATCH((src_y1 << 16) | src_x1); /* src x1,y1 */
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OUT_BATCH(src_pitch);
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OUT_BATCH(src_pitch);
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OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
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OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
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ADVANCE_BATCH();
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ADVANCE_BATCH();
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intel_batchbuffer_flush(batch);
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intel_batchbuffer_flush(batch);
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}
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}
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void
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intel_copy_bo(struct intel_batchbuffer *batch,
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drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
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int width, int height)
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{
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intel_blt_copy(batch,
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src_bo, 0, 0, width * 4,
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dst_bo, 0, 0, width * 4,
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width, height, 32);
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}
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@ -96,6 +96,11 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
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#define ADVANCE_BATCH() do { \
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#define ADVANCE_BATCH() do { \
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} while(0)
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} while(0)
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void
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intel_blt_copy(struct intel_batchbuffer *batch,
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drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch,
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drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch,
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int width, int height, int bpp);
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void intel_copy_bo(struct intel_batchbuffer *batch,
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void intel_copy_bo(struct intel_batchbuffer *batch,
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drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
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drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
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int width, int height);
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int width, int height);
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