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tests: add pc8
This test chekcs our code that enables Package C8+. The environment
requirements for this test are quite complicated:
- The machine needs to be properly configured to reach PC8+ when
possible, which means all the power management policies and device
drivers must be properly configured.
- You need at least one output connected.
- You need the /dev/cpu/0/msr file available.
- You need the /dev/i2c-* files available.
v2: - Many many changes due to the latest review comments and rebase.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Paulo Zanoni
Daniel Vetter
parent
a7aaf85ac0
commit
c158128de5
1
tests/.gitignore
vendored
1
tests/.gitignore
vendored
@ -94,6 +94,7 @@ getversion
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kms_flip
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kms_render
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kms_setmode
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pc8
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prime_nv_api
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prime_nv_pcopy
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prime_nv_test
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@ -45,6 +45,7 @@ TESTS_progs_M = \
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kms_render \
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kms_setmode \
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$(NOUVEAU_TESTS_M) \
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pc8 \
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prime_self_import \
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$(NULL)
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804
tests/pc8.c
Normal file
804
tests/pc8.c
Normal file
@ -0,0 +1,804 @@
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/*
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* Copyright © 2013 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Paulo Zanoni <paulo.r.zanoni@intel.com>
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*
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <dirent.h>
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#include <sys/ioctl.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <linux/i2c.h>
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#include <linux/i2c-dev.h>
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#include "drm.h"
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#include "drmtest.h"
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#include "intel_batchbuffer.h"
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#include "intel_gpu_tools.h"
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#include "i915_drm.h"
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#define MSR_PC8_RES 0x630
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#define MSR_PC9_RES 0x631
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#define MSR_PC10_RES 0x632
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#define MAX_CONNECTORS 32
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#define MAX_ENCODERS 32
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#define MAX_CRTCS 16
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int drm_fd, msr_fd;
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struct mode_set_data ms_data;
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/* Stuff used when creating FBs and mode setting. */
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struct mode_set_data {
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drmModeResPtr res;
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drmModeConnectorPtr connectors[MAX_CONNECTORS];
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drmModePropertyBlobPtr edids[MAX_CONNECTORS];
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drm_intel_bufmgr *bufmgr;
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uint32_t devid;
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};
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/* Stuff we query at different times so we can compare. */
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struct compare_data {
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drmModeResPtr res;
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drmModeEncoderPtr encoders[MAX_ENCODERS];
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drmModeConnectorPtr connectors[MAX_CONNECTORS];
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drmModeCrtcPtr crtcs[MAX_CRTCS];
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drmModePropertyBlobPtr edids[MAX_CONNECTORS];
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};
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struct compare_registers {
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/* We know these are lost */
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uint32_t arb_mode;
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uint32_t tilectl;
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/* Stuff touched at init_clock_gating, so we can make sure we
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* don't need to call it when reiniting. */
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uint32_t gen6_ucgctl2;
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uint32_t gen7_l3cntlreg1;
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uint32_t transa_chicken1;
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uint32_t deier;
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uint32_t gtier;
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uint32_t ddi_buf_trans_a_1;
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uint32_t ddi_buf_trans_b_5;
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uint32_t ddi_buf_trans_c_10;
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uint32_t ddi_buf_trans_d_15;
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uint32_t ddi_buf_trans_e_20;
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};
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/* If the read fails, then the machine doesn't support PC8+ residencies. */
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static bool supports_pc8_plus_residencies(void)
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{
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int rc;
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uint64_t val;
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rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC8_RES);
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if (!rc == sizeof(val))
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return false;
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rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC9_RES);
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if (!rc == sizeof(val))
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return false;
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rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC10_RES);
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if (!rc == sizeof(val))
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return false;
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return true;
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}
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static uint64_t get_residency(uint32_t type)
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{
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int rc;
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uint64_t ret;
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rc = pread(msr_fd, &ret, sizeof(uint64_t), type);
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igt_assert(rc == sizeof(ret));
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return ret;
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}
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static bool pc8_plus_residency_changed(unsigned int timeout_sec)
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{
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unsigned int i;
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uint64_t res_pc8, res_pc9, res_pc10;
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int to_sleep = 100 * 1000;
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res_pc8 = get_residency(MSR_PC8_RES);
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res_pc9 = get_residency(MSR_PC9_RES);
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res_pc10 = get_residency(MSR_PC10_RES);
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for (i = 0; i < timeout_sec * 1000 * 1000; i += to_sleep) {
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if (res_pc8 != get_residency(MSR_PC8_RES) ||
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res_pc9 != get_residency(MSR_PC9_RES) ||
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res_pc10 != get_residency(MSR_PC10_RES)) {
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return true;
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}
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usleep(to_sleep);
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}
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return false;
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}
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/* Checks not only if PC8+ is allowed, but also if we're reaching it.
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* We call this when we expect this function to return quickly since PC8 is
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* actually enabled, so the 30s timeout we use shouldn't matter. */
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static bool pc8_plus_enabled(void)
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{
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return pc8_plus_residency_changed(30);
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}
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/* We call this when we expect PC8+ to be actually disabled, so we should not
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* return until the 5s timeout expires. In other words: in the "happy case",
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* every time we call this function the program will take 5s more to finish. */
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static bool pc8_plus_disabled(void)
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{
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return !pc8_plus_residency_changed(5);
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}
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static void disable_all_screens(struct mode_set_data *data)
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{
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int i, rc;
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for (i = 0; i < data->res->count_crtcs; i++) {
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rc = drmModeSetCrtc(drm_fd, data->res->crtcs[i], -1, 0, 0,
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NULL, 0, NULL);
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igt_assert(rc == 0);
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}
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}
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static uint32_t create_fb(struct mode_set_data *data, int width, int height)
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{
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struct kmstest_fb fb;
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cairo_t *cr;
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uint32_t buffer_id;
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buffer_id = kmstest_create_fb(drm_fd, width, height, 32, 24, false,
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&fb);
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cr = kmstest_get_cairo_ctx(drm_fd, &fb);
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kmstest_paint_test_pattern(cr, width, height);
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return buffer_id;
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}
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static void enable_one_screen(struct mode_set_data *data)
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{
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uint32_t crtc_id = 0, buffer_id = 0, connector_id = 0;
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drmModeModeInfoPtr mode = NULL;
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int i, rc;
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for (i = 0; i < data->res->count_connectors; i++) {
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drmModeConnectorPtr c = data->connectors[i];
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if (c->connection == DRM_MODE_CONNECTED && c->count_modes) {
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connector_id = c->connector_id;
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mode = &c->modes[0];
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break;
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}
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}
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crtc_id = data->res->crtcs[0];
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buffer_id = create_fb(data, mode->hdisplay, mode->vdisplay);
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igt_assert(crtc_id);
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igt_assert(buffer_id);
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igt_assert(connector_id);
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igt_assert(mode);
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rc = drmModeSetCrtc(drm_fd, crtc_id, buffer_id, 0, 0, &connector_id,
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1, mode);
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igt_assert(rc == 0);
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}
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static drmModePropertyBlobPtr get_connector_edid(drmModeConnectorPtr connector,
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int index)
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{
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unsigned int i;
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drmModeObjectPropertiesPtr props;
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drmModePropertyBlobPtr ret = NULL;
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props = drmModeObjectGetProperties(drm_fd, connector->connector_id,
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DRM_MODE_OBJECT_CONNECTOR);
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for (i = 0; i < props->count_props; i++) {
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drmModePropertyPtr prop = drmModeGetProperty(drm_fd,
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props->props[i]);
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if (strcmp(prop->name, "EDID") == 0) {
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igt_assert(prop->flags & DRM_MODE_PROP_BLOB);
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igt_assert(prop->count_blobs == 0);
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ret = drmModeGetPropertyBlob(drm_fd,
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props->prop_values[i]);
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}
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drmModeFreeProperty(prop);
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}
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drmModeFreeObjectProperties(props);
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return ret;
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}
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static void init_mode_set_data(struct mode_set_data *data)
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{
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int i;
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data->res = drmModeGetResources(drm_fd);
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igt_assert(data->res);
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igt_assert(data->res->count_connectors <= MAX_CONNECTORS);
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for (i = 0; i < data->res->count_connectors; i++) {
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data->connectors[i] = drmModeGetConnector(drm_fd,
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data->res->connectors[i]);
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data->edids[i] = get_connector_edid(data->connectors[i], i);
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}
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data->bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096);
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data->devid = intel_get_drm_devid(drm_fd);
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do_or_die(igt_set_vt_graphics_mode());
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drm_intel_bufmgr_gem_enable_reuse(data->bufmgr);
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}
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static void fini_mode_set_data(struct mode_set_data *data)
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{
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int i;
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drm_intel_bufmgr_destroy(data->bufmgr);
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for (i = 0; i < data->res->count_connectors; i++) {
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drmModeFreeConnector(data->connectors[i]);
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drmModeFreePropertyBlob(data->edids[i]);
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}
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drmModeFreeResources(data->res);
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}
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static void get_drm_info(struct compare_data *data)
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{
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int i;
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data->res = drmModeGetResources(drm_fd);
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igt_assert(data->res);
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igt_assert(data->res->count_connectors <= MAX_CONNECTORS);
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igt_assert(data->res->count_encoders <= MAX_ENCODERS);
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igt_assert(data->res->count_crtcs <= MAX_CRTCS);
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for (i = 0; i < data->res->count_connectors; i++) {
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data->connectors[i] = drmModeGetConnector(drm_fd,
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data->res->connectors[i]);
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data->edids[i] = get_connector_edid(data->connectors[i], i);
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}
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for (i = 0; i < data->res->count_encoders; i++)
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data->encoders[i] = drmModeGetEncoder(drm_fd,
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data->res->encoders[i]);
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for (i = 0; i < data->res->count_crtcs; i++)
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data->crtcs[i] = drmModeGetCrtc(drm_fd, data->res->crtcs[i]);
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}
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static void get_registers(struct compare_registers *data)
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{
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intel_register_access_init(intel_get_pci_device(), 0);
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data->arb_mode = INREG(0x4030);
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data->tilectl = INREG(0x101000);
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data->gen6_ucgctl2 = INREG(0x9404);
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data->gen7_l3cntlreg1 = INREG(0xB0C1);
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data->transa_chicken1 = INREG(0xF0060);
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data->deier = INREG(0x4400C);
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data->gtier = INREG(0x4401C);
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data->ddi_buf_trans_a_1 = INREG(0x64E00);
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data->ddi_buf_trans_b_5 = INREG(0x64E70);
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data->ddi_buf_trans_c_10 = INREG(0x64EE0);
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data->ddi_buf_trans_d_15 = INREG(0x64F58);
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data->ddi_buf_trans_e_20 = INREG(0x64FCC);
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intel_register_access_fini();
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}
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static void free_drm_info(struct compare_data *data)
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{
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int i;
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for (i = 0; i < data->res->count_connectors; i++) {
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drmModeFreeConnector(data->connectors[i]);
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drmModeFreePropertyBlob(data->edids[i]);
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}
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for (i = 0; i < data->res->count_encoders; i++)
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drmModeFreeEncoder(data->encoders[i]);
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for (i = 0; i < data->res->count_crtcs; i++)
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drmModeFreeCrtc(data->crtcs[i]);
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drmModeFreeResources(data->res);
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}
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#define COMPARE(d1, d2, data) igt_assert(d1->data == d2->data)
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#define COMPARE_ARRAY(d1, d2, size, data) do { \
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for (i = 0; i < size; i++) \
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igt_assert(d1->data[i] == d2->data[i]); \
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} while (0)
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static void assert_drm_resources_equal(struct compare_data *d1,
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struct compare_data *d2)
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{
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COMPARE(d1, d2, res->count_connectors);
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COMPARE(d1, d2, res->count_encoders);
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COMPARE(d1, d2, res->count_crtcs);
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COMPARE(d1, d2, res->min_width);
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COMPARE(d1, d2, res->max_width);
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COMPARE(d1, d2, res->min_height);
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COMPARE(d1, d2, res->max_height);
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}
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static void assert_modes_equal(drmModeModeInfoPtr m1, drmModeModeInfoPtr m2)
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{
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COMPARE(m1, m2, clock);
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COMPARE(m1, m2, hdisplay);
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COMPARE(m1, m2, hsync_start);
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COMPARE(m1, m2, hsync_end);
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COMPARE(m1, m2, htotal);
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COMPARE(m1, m2, hskew);
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COMPARE(m1, m2, vdisplay);
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COMPARE(m1, m2, vsync_start);
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COMPARE(m1, m2, vsync_end);
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COMPARE(m1, m2, vtotal);
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COMPARE(m1, m2, vscan);
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COMPARE(m1, m2, vrefresh);
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COMPARE(m1, m2, flags);
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COMPARE(m1, m2, type);
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igt_assert(strcmp(m1->name, m2->name) == 0);
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}
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static void assert_drm_connectors_equal(drmModeConnectorPtr c1,
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drmModeConnectorPtr c2)
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{
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int i;
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COMPARE(c1, c2, connector_id);
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COMPARE(c1, c2, connector_type);
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COMPARE(c1, c2, connector_type_id);
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COMPARE(c1, c2, mmWidth);
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COMPARE(c1, c2, mmHeight);
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COMPARE(c1, c2, count_modes);
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COMPARE(c1, c2, count_props);
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COMPARE(c1, c2, count_encoders);
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COMPARE_ARRAY(c1, c2, c1->count_props, props);
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COMPARE_ARRAY(c1, c2, c1->count_encoders, encoders);
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for (i = 0; i < c1->count_modes; i++)
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assert_modes_equal(&c1->modes[0], &c2->modes[0]);
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}
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static void assert_drm_encoders_equal(drmModeEncoderPtr e1,
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drmModeEncoderPtr e2)
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{
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COMPARE(e1, e2, encoder_id);
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COMPARE(e1, e2, encoder_type);
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COMPARE(e1, e2, possible_crtcs);
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COMPARE(e1, e2, possible_clones);
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}
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static void assert_drm_crtcs_equal(drmModeCrtcPtr c1, drmModeCrtcPtr c2)
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{
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COMPARE(c1, c2, crtc_id);
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}
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static void assert_drm_edids_equal(drmModePropertyBlobPtr e1,
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drmModePropertyBlobPtr e2)
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{
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if (!e1 && !e2)
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return;
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igt_assert(e1 && e2);
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COMPARE(e1, e2, id);
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COMPARE(e1, e2, length);
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||||
igt_assert(memcmp(e1->data, e2->data, e1->length) == 0);
|
||||
}
|
||||
|
||||
static void compare_registers(struct compare_registers *d1,
|
||||
struct compare_registers *d2)
|
||||
{
|
||||
COMPARE(d1, d2, gen6_ucgctl2);
|
||||
COMPARE(d1, d2, gen7_l3cntlreg1);
|
||||
COMPARE(d1, d2, transa_chicken1);
|
||||
COMPARE(d1, d2, arb_mode);
|
||||
COMPARE(d1, d2, tilectl);
|
||||
COMPARE(d1, d2, arb_mode);
|
||||
COMPARE(d1, d2, tilectl);
|
||||
COMPARE(d1, d2, gtier);
|
||||
COMPARE(d1, d2, ddi_buf_trans_a_1);
|
||||
COMPARE(d1, d2, ddi_buf_trans_b_5);
|
||||
COMPARE(d1, d2, ddi_buf_trans_c_10);
|
||||
COMPARE(d1, d2, ddi_buf_trans_d_15);
|
||||
COMPARE(d1, d2, ddi_buf_trans_e_20);
|
||||
}
|
||||
|
||||
static void assert_drm_infos_equal(struct compare_data *d1,
|
||||
struct compare_data *d2)
|
||||
{
|
||||
int i;
|
||||
|
||||
assert_drm_resources_equal(d1, d2);
|
||||
|
||||
for (i = 0; i < d1->res->count_connectors; i++) {
|
||||
assert_drm_connectors_equal(d1->connectors[i],
|
||||
d2->connectors[i]);
|
||||
assert_drm_edids_equal(d1->edids[i], d2->edids[i]);
|
||||
}
|
||||
|
||||
for (i = 0; i < d1->res->count_encoders; i++)
|
||||
assert_drm_encoders_equal(d1->encoders[i], d2->encoders[i]);
|
||||
|
||||
for (i = 0; i < d1->res->count_crtcs; i++)
|
||||
assert_drm_crtcs_equal(d1->crtcs[i], d2->crtcs[i]);
|
||||
}
|
||||
|
||||
static void blt_color_fill(struct intel_batchbuffer *batch,
|
||||
drm_intel_bo *buf,
|
||||
const unsigned int pages)
|
||||
{
|
||||
const unsigned short height = pages/4;
|
||||
const unsigned short width = 4096;
|
||||
|
||||
BEGIN_BATCH(5);
|
||||
OUT_BATCH(COLOR_BLT_CMD | COLOR_BLT_WRITE_ALPHA | COLOR_BLT_WRITE_RGB);
|
||||
OUT_BATCH((3 << 24) | /* 32 Bit Color */
|
||||
0xF0 | /* Raster OP copy background register */
|
||||
0); /* Dest pitch is 0 */
|
||||
OUT_BATCH(width << 16 | height);
|
||||
OUT_RELOC(buf, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
|
||||
OUT_BATCH(rand()); /* random pattern */
|
||||
ADVANCE_BATCH();
|
||||
}
|
||||
|
||||
static void test_batch(struct mode_set_data *data)
|
||||
{
|
||||
struct intel_batchbuffer *batch;
|
||||
int64_t timeout_ns = 1000 * 1000 * 1000 * 2;
|
||||
drm_intel_bo *dst;
|
||||
int i, rc;
|
||||
|
||||
dst = drm_intel_bo_alloc(data->bufmgr, "dst", (8 << 20), 4096);
|
||||
|
||||
batch = intel_batchbuffer_alloc(data->bufmgr,
|
||||
intel_get_drm_devid(drm_fd));
|
||||
|
||||
for (i = 0; i < 1000; i++)
|
||||
blt_color_fill(batch, dst, ((8 << 20) >> 12));
|
||||
|
||||
rc = drm_intel_gem_bo_wait(dst, timeout_ns);
|
||||
igt_assert(!rc);
|
||||
|
||||
intel_batchbuffer_free(batch);
|
||||
}
|
||||
|
||||
/* We could check the checksum too, but just the header is probably enough. */
|
||||
static bool edid_is_valid(const unsigned char *edid)
|
||||
{
|
||||
char edid_header[] = {
|
||||
0x0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x0,
|
||||
};
|
||||
|
||||
return (memcmp(edid, edid_header, sizeof(edid_header)) == 0);
|
||||
}
|
||||
|
||||
static int count_drm_valid_edids(struct mode_set_data *data)
|
||||
{
|
||||
int i, ret = 0;
|
||||
|
||||
for (i = 0; i < data->res->count_connectors; i++)
|
||||
if (data->edids[i] && edid_is_valid(data->edids[i]->data))
|
||||
ret++;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int count_drm_edp_outputs(struct mode_set_data *data)
|
||||
{
|
||||
int i, ret = 0;
|
||||
|
||||
for (i = 0; i < data->res->count_connectors; i++)
|
||||
if (data->connectors[i]->connector_type ==
|
||||
DRM_MODE_CONNECTOR_eDP)
|
||||
ret++;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static bool i2c_edid_is_valid(int fd)
|
||||
{
|
||||
int rc;
|
||||
unsigned char edid[128] = {};
|
||||
struct i2c_msg msgs[] = {
|
||||
{ /* Start at 0. */
|
||||
.addr = 0x50,
|
||||
.flags = 0,
|
||||
.len = 1,
|
||||
.buf = edid,
|
||||
}, { /* Now read the EDID. */
|
||||
.addr = 0x50,
|
||||
.flags = I2C_M_RD,
|
||||
.len = 128,
|
||||
.buf = edid,
|
||||
}
|
||||
};
|
||||
struct i2c_rdwr_ioctl_data msgset = {
|
||||
.msgs = msgs,
|
||||
.nmsgs = 2,
|
||||
};
|
||||
|
||||
rc = ioctl(fd, I2C_RDWR, &msgset);
|
||||
return (rc >= 0) ? edid_is_valid(edid) : false;
|
||||
}
|
||||
|
||||
static int count_i2c_valid_edids(void)
|
||||
{
|
||||
int fd, ret = 0;
|
||||
DIR *dir;
|
||||
|
||||
struct dirent *dirent;
|
||||
char full_name[32];
|
||||
|
||||
dir = opendir("/dev/");
|
||||
igt_assert(dir);
|
||||
|
||||
while ((dirent = readdir(dir))) {
|
||||
if (strncmp(dirent->d_name, "i2c-", 4) == 0) {
|
||||
snprintf(full_name, 32, "/dev/%s", dirent->d_name);
|
||||
fd = open(full_name, O_RDWR);
|
||||
igt_assert(fd != -1);
|
||||
if (i2c_edid_is_valid(fd))
|
||||
ret++;
|
||||
close(fd);
|
||||
}
|
||||
}
|
||||
|
||||
closedir(dir);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* We run this test when all outputs are turned off. When eDP panels are turned
|
||||
* off, I2C doesn't work on them and we get a nice dmesg backtrace. So count how
|
||||
* many eDP panels we have and subtract them. */
|
||||
static bool test_i2c(struct mode_set_data *data)
|
||||
{
|
||||
int i2c_edids = count_i2c_valid_edids();
|
||||
int drm_edids = count_drm_valid_edids(data);
|
||||
int edps = count_drm_edp_outputs(data);
|
||||
|
||||
return i2c_edids + edps == drm_edids;
|
||||
}
|
||||
|
||||
static bool setup_environment(void)
|
||||
{
|
||||
int i2c_dev_files;
|
||||
DIR *dev_dir;
|
||||
struct dirent *dirent;
|
||||
|
||||
drm_fd = drm_open_any();
|
||||
if (drm_fd <= 0)
|
||||
return false;
|
||||
|
||||
init_mode_set_data(&ms_data);
|
||||
|
||||
/* Only Haswell supports the PC8 feature. */
|
||||
if (!IS_HASWELL(ms_data.devid)) {
|
||||
printf("PC8+ feature only supported on Haswell.\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Make sure our Kernel supports MSR and the module is loaded. */
|
||||
msr_fd = open("/dev/cpu/0/msr", O_RDONLY);
|
||||
if (msr_fd == -1) {
|
||||
printf("Can't open /dev/cpu/0/msr.\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Make sure the /dev/i2c-* files exist. */
|
||||
dev_dir = opendir("/dev");
|
||||
if (!dev_dir) {
|
||||
printf("Can't open /dev.\n");
|
||||
return false;
|
||||
}
|
||||
i2c_dev_files = 0;
|
||||
while ((dirent = readdir(dev_dir))) {
|
||||
if (strncmp(dirent->d_name, "i2c-", 4) == 0)
|
||||
i2c_dev_files++;
|
||||
}
|
||||
closedir(dev_dir);
|
||||
if (!i2c_dev_files) {
|
||||
printf("No /dev/i2c-* files.\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Non-ULT machines don't support PC8+. */
|
||||
if (!supports_pc8_plus_residencies()) {
|
||||
printf("Machine doesn't support PC8+ residencies.\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Make sure PC8+ residencies move! */
|
||||
disable_all_screens(&ms_data);
|
||||
if (!pc8_plus_enabled()) {
|
||||
printf("Machine is not reaching PC8+ states, please check its "
|
||||
"configuration.\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Make sure PC8+ residencies stop! */
|
||||
enable_one_screen(&ms_data);
|
||||
if (!pc8_plus_disabled()) {
|
||||
printf("PC8+ residency didn't stop with screen enabled.\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static void teardown_environment(void)
|
||||
{
|
||||
fini_mode_set_data(&ms_data);
|
||||
drmClose(drm_fd);
|
||||
close(msr_fd);
|
||||
}
|
||||
|
||||
/* Test of the DRM resources reported by the IOCTLs are still the same. This
|
||||
* ensures we still see the monitors with the same eyes. We get the EDIDs and
|
||||
* compare them, which ensures we use DP AUX or GMBUS depending on what's
|
||||
* connected. */
|
||||
static void drm_resources_equal_subtest(void)
|
||||
{
|
||||
struct compare_data pre_pc8, during_pc8, post_pc8;
|
||||
|
||||
printf("Checking the if the DRM resources match.\n");
|
||||
|
||||
enable_one_screen(&ms_data);
|
||||
igt_assert(pc8_plus_disabled());
|
||||
get_drm_info(&pre_pc8);
|
||||
igt_assert(pc8_plus_disabled());
|
||||
|
||||
disable_all_screens(&ms_data);
|
||||
igt_assert(pc8_plus_enabled());
|
||||
get_drm_info(&during_pc8);
|
||||
igt_assert(pc8_plus_enabled());
|
||||
|
||||
enable_one_screen(&ms_data);
|
||||
igt_assert(pc8_plus_disabled());
|
||||
get_drm_info(&post_pc8);
|
||||
igt_assert(pc8_plus_disabled());
|
||||
|
||||
assert_drm_infos_equal(&pre_pc8, &during_pc8);
|
||||
assert_drm_infos_equal(&pre_pc8, &post_pc8);
|
||||
|
||||
free_drm_info(&pre_pc8);
|
||||
free_drm_info(&during_pc8);
|
||||
free_drm_info(&post_pc8);
|
||||
}
|
||||
|
||||
/* Make sure interrupts are working. */
|
||||
static void batch_subtest(void)
|
||||
{
|
||||
printf("Testing batchbuffers.\n");
|
||||
|
||||
enable_one_screen(&ms_data);
|
||||
igt_assert(pc8_plus_disabled());
|
||||
|
||||
disable_all_screens(&ms_data);
|
||||
igt_assert(pc8_plus_enabled());
|
||||
test_batch(&ms_data);
|
||||
igt_assert(pc8_plus_enabled());
|
||||
}
|
||||
|
||||
/* Try to use raw I2C, which also needs interrupts. */
|
||||
static void i2c_subtest(void)
|
||||
{
|
||||
printf("Testing raw i2c protocol calls.\n");
|
||||
|
||||
enable_one_screen(&ms_data);
|
||||
igt_assert(pc8_plus_disabled());
|
||||
|
||||
disable_all_screens(&ms_data);
|
||||
igt_assert(pc8_plus_enabled());
|
||||
igt_assert(test_i2c(&ms_data));
|
||||
igt_assert(pc8_plus_enabled());
|
||||
|
||||
enable_one_screen(&ms_data);
|
||||
}
|
||||
|
||||
/* Make us enter/leave PC8+ many times. */
|
||||
static void stress_test(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
printf("Stress testing.\n");
|
||||
|
||||
for (i = 0; i < 100; i++) {
|
||||
disable_all_screens(&ms_data);
|
||||
igt_assert(pc8_plus_enabled());
|
||||
test_batch(&ms_data);
|
||||
igt_assert(pc8_plus_enabled());
|
||||
}
|
||||
}
|
||||
|
||||
/* Just reading/writing registers from outside the Kernel is not really a safe
|
||||
* thing to do on Haswell, so don't do this test on the default case. */
|
||||
static void register_compare_subtest(void)
|
||||
{
|
||||
struct compare_registers pre_pc8, post_pc8;
|
||||
|
||||
printf("Testing register compare.\n");
|
||||
|
||||
enable_one_screen(&ms_data);
|
||||
igt_assert(pc8_plus_disabled());
|
||||
get_registers(&pre_pc8);
|
||||
igt_assert(pc8_plus_disabled());
|
||||
|
||||
disable_all_screens(&ms_data);
|
||||
igt_assert(pc8_plus_enabled());
|
||||
enable_one_screen(&ms_data);
|
||||
igt_assert(pc8_plus_disabled());
|
||||
/* Wait for the registers to be restored. */
|
||||
sleep(1);
|
||||
get_registers(&post_pc8);
|
||||
igt_assert(pc8_plus_disabled());
|
||||
|
||||
compare_registers(&pre_pc8, &post_pc8);
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
bool do_register_compare = false;
|
||||
|
||||
if (argc > 1 && strcmp(argv[1], "--do-register-compare") == 0)
|
||||
do_register_compare = true;
|
||||
|
||||
igt_subtest_init(argc, argv);
|
||||
|
||||
/* Skip instead of failing in case the machine is not prepared to reach
|
||||
* PC8+. We don't want bug reports from cases where the machine is just
|
||||
* not properly configured. */
|
||||
printf("Checking if the environment is properly configured.\n");
|
||||
if (!setup_environment())
|
||||
return 77;
|
||||
|
||||
igt_subtest("drm-resources-equal")
|
||||
drm_resources_equal_subtest();
|
||||
igt_subtest("batch")
|
||||
batch_subtest();
|
||||
igt_subtest("i2c")
|
||||
i2c_subtest();
|
||||
igt_subtest("stress-test")
|
||||
stress_test();
|
||||
if (do_register_compare)
|
||||
igt_subtest("register-compare")
|
||||
register_compare_subtest();
|
||||
|
||||
teardown_environment();
|
||||
|
||||
printf("Done!\n");
|
||||
return 0;
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user