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https://github.com/tiagovignatti/intel-gpu-tools.git
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Merge replicative code in gram.y
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b0b540f02a
commit
c0ebde2786
@ -843,34 +843,7 @@ branchloopinstruction:
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set_direct_src_operand(&ip_src, &dst, BRW_REGISTER_TYPE_UD);
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set_direct_src_operand(&ip_src, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src1(&$$, &$4);
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set_instruction_src1(&$$, &$4);
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}
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$$.first_reloc_target = $4.reloc_target;
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| predicate branchloopop execsize STRING
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{
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struct direct_reg dst;
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struct dst_operand ip_dst;
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struct src_operand ip_src;
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struct src_operand imm;
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dst.reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
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dst.reg_nr = BRW_ARF_IP;
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dst.subreg_nr = 0;
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memset (&imm, '\0', sizeof (imm));
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imm.reg_file = BRW_IMMEDIATE_VALUE;
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imm.reg_type = BRW_REGISTER_TYPE_D;
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imm.imm32 = 0;
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memset(&$$, 0, sizeof($$));
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$$.header.opcode = $2;
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$$.header.execution_size = $3;
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set_instruction_predicate(&$$, &$1);
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$$.header.thread_control |= BRW_THREAD_SWITCH;
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set_direct_dst_operand(&ip_dst, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_dest(&$$, &ip_dst);
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set_direct_src_operand(&ip_src, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src1(&$$, &imm);
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$$.first_reloc_target = $4;
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}
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}
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;
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;
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@ -883,11 +856,6 @@ elseinstruction: ELSE execsize relativelocation
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struct dst_operand ip_dst;
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struct dst_operand ip_dst;
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struct src_operand ip_src;
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struct src_operand ip_src;
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/* The jump instruction requires that the IP register
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* be the destination and first source operand, while the
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* offset is the second source operand. The offset is added
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* to the IP pre-increment.
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*/
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dst.reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
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dst.reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
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dst.reg_nr = BRW_ARF_IP;
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dst.reg_nr = BRW_ARF_IP;
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dst.subreg_nr = 0;
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dst.subreg_nr = 0;
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@ -904,33 +872,7 @@ elseinstruction: ELSE execsize relativelocation
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set_direct_src_operand(&ip_src, &dst, BRW_REGISTER_TYPE_UD);
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set_direct_src_operand(&ip_src, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src1(&$$, &$3);
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set_instruction_src1(&$$, &$3);
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}
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$$.first_reloc_target = $3.reloc_target;
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| ELSE execsize STRING
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{
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struct direct_reg dst;
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struct dst_operand ip_dst;
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struct src_operand ip_src;
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struct src_operand imm;
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dst.reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
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dst.reg_nr = BRW_ARF_IP;
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dst.subreg_nr = 0;
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memset (&imm, '\0', sizeof (imm));
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imm.reg_file = BRW_IMMEDIATE_VALUE;
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imm.reg_type = BRW_REGISTER_TYPE_D;
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imm.imm32 = 0;
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memset(&$$, 0, sizeof($$));
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$$.header.opcode = $1;
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$$.header.execution_size = $2;
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$$.header.thread_control |= BRW_THREAD_SWITCH;
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set_direct_dst_operand(&ip_dst, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_dest(&$$, &ip_dst);
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set_direct_src_operand(&ip_src, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src1(&$$, &imm);
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$$.first_reloc_target = $3;
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}
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}
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;
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;
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@ -2081,25 +2023,27 @@ nullreg: NULL_TOKEN
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;
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;
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/* 1.4.6: Relative locations */
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/* 1.4.6: Relative locations */
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relativelocation: imm32
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relativelocation:
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EXP
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{
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{
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if ($1.r != imm32_d) {
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if (($1 > 32767) || ($1 < -32768)) {
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fprintf (stderr,
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"error: non-int offset representation\n");
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YYERROR;
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}
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if (($1.u.signed_d > 32767) || ($1.u.signed_d < -32768)) {
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fprintf(stderr,
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fprintf(stderr,
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"error: relative offset %d out of range \n",
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"error: relative offset %d out of range \n",
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$1.u.signed_d);
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$1);
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YYERROR;
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YYERROR;
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}
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}
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memset (&$$, '\0', sizeof ($$));
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memset (&$$, '\0', sizeof ($$));
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$$.reg_file = BRW_IMMEDIATE_VALUE;
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$$.reg_file = BRW_IMMEDIATE_VALUE;
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$$.reg_type = BRW_REGISTER_TYPE_D;
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$$.reg_type = BRW_REGISTER_TYPE_D;
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$$.imm32 = $1.u.d & 0x0000ffff;
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$$.imm32 = $1 & 0x0000ffff;
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}
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{
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memset (&$$, '\0', sizeof ($$));
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$$.reg_file = BRW_IMMEDIATE_VALUE;
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$$.reg_type = BRW_REGISTER_TYPE_D;
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$$.reloc_target = $1;
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}
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}
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;
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;
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