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lib: fix gen5 workaround emission
Using BEGIN_BATCH can lead to a nice inf recursion through require_space -> flush_batch -> BEGIN_BATCH. Also fix things up to always require BATCH_RESERVED. We need 2 dwords for the gen5 workaround and 2 dwords for MI_BB_END.
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@ -84,10 +84,11 @@ intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring)
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return;
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return;
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if (IS_GEN5(batch->devid)) {
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if (IS_GEN5(batch->devid)) {
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BEGIN_BATCH(2);
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/* emit gen5 w/a without batch space checks - we reserve that
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OUT_BATCH(CMD_POLY_STIPPLE_OFFSET << 16);
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* already. */
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OUT_BATCH(0);
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*(uint32_t *) (batch->ptr) = CMD_POLY_STIPPLE_OFFSET << 16;
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ADVANCE_BATCH();
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*(uint32_t *) (batch->ptr) = 0;
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batch->ptr += 8;
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}
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}
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/* Round batchbuffer usage to 2 DWORDs. */
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/* Round batchbuffer usage to 2 DWORDs. */
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@ -63,7 +63,7 @@ static inline void
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intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
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intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
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unsigned int sz)
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unsigned int sz)
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{
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{
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assert(sz < BATCH_SZ - 8);
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assert(sz < BATCH_SZ - BATCH_RESERVED);
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if (intel_batchbuffer_space(batch) < sz)
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if (intel_batchbuffer_space(batch) < sz)
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intel_batchbuffer_flush(batch);
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intel_batchbuffer_flush(batch);
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}
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}
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