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Add support for new chips

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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
This commit is contained in:
Xiang, Haihao 2009-09-03 09:50:00 +08:00
parent b20efcf585
commit bbebf6b1c9
2 changed files with 51 additions and 15 deletions
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10
lib/intel_chipset.h
View File

@ -67,6 +67,9 @@
#define PCI_CHIP_G45_G 0x2E22
#define PCI_CHIP_G41_G 0x2E32
#define PCI_CHIP_ILD_G 0x0042
#define PCI_CHIP_ILM_G 0x0046
#define IS_MOBILE(devid) (devid == PCI_CHIP_I855_GM || \
devid == PCI_CHIP_I915_GM || \
devid == PCI_CHIP_I945_GM || \
@ -82,6 +85,10 @@
#define IS_GM45(devid) (devid == PCI_CHIP_GM45_GM)
#define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid))
#define IS_ILD(devid) (devid == PCI_CHIP_ILD_G)
#define IS_ILM(devid) (devid == PCI_CHIP_ILM_G)
#define IS_IRONLAKE(devid) (IS_ILD(devid) || IS_ILM(devid))
#define IS_915(devid) (devid == PCI_CHIP_I915_G || \
devid == PCI_CHIP_E7221_G || \
devid == PCI_CHIP_I915_GM)
@ -99,7 +106,8 @@
devid == PCI_CHIP_I965_GM || \
devid == PCI_CHIP_I965_GME || \
devid == PCI_CHIP_I946_GZ || \
IS_G4X(devid))
IS_G4X(devid) || \
IS_IRONLAKE(devid))
#define IS_9XX(devid) (IS_915(devid) || \
IS_945(devid) || \

36
tools/intel_gpu_dump.c
View File

@ -1502,7 +1502,7 @@ i965_decode_urb_fence(uint32_t *data, uint32_t hw_offset, int len, int count,
}
static int
decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures)
decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures, uint32_t devid)
{
unsigned int opcode, len;
int i;
@ -1558,9 +1558,11 @@ decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures)
data[1] >> 6, data[1] & 0x3f);
return len;
case 0x6101:
if (len != 6)
if ((IS_IRONLAKE(devid) && len != 8) ||
(!IS_IRONLAKE(devid) && len != 6))
fprintf(out, "Bad count in STATE_BASE_ADDRESS\n");
if (count < 6)
if ((IS_IRONLAKE(devid) && count < 8) ||
(!IS_IRONLAKE(devid) && count < 6))
BUFFER_FAIL(count, len, "STATE_BASE_ADDRESS");
instr_out(data, hw_offset, 0,
@ -1584,6 +1586,31 @@ decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures)
} else
instr_out(data, hw_offset, 3, "Indirect state not updated\n");
if (IS_IRONLAKE(devid)) {
if (data[4] & 1) {
instr_out(data, hw_offset, 4, "Instruction base address at 0x%08x\n",
data[4] & ~1);
} else
instr_out(data, hw_offset, 4, "Instruction base address not updated\n");
if (data[5] & 1) {
instr_out(data, hw_offset, 5, "General state upper bound 0x%08x\n",
data[5] & ~1);
} else
instr_out(data, hw_offset, 5, "General state not updated\n");
if (data[6] & 1) {
instr_out(data, hw_offset, 6, "Indirect state upper bound 0x%08x\n",
data[6] & ~1);
} else
instr_out(data, hw_offset, 6, "Indirect state not updated\n");
if (data[7] & 1) {
instr_out(data, hw_offset, 7, "Instruction access upper bound 0x%08x\n",
data[7] & ~1);
} else
instr_out(data, hw_offset, 7, "Instruction access upper bound not updated\n");
} else {
if (data[4] & 1) {
instr_out(data, hw_offset, 4, "General state upper bound 0x%08x\n",
data[4] & ~1);
@ -1595,6 +1622,7 @@ decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures)
data[5] & ~1);
} else
instr_out(data, hw_offset, 5, "Indirect state not updated\n");
}
return len;
case 0x7800:
@ -1910,7 +1938,7 @@ intel_decode(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid)
case 0x3:
if (IS_965(devid)) {
index += decode_3d_965(data + index, count - index,
hw_offset + index * 4, &failures);
hw_offset + index * 4, &failures, devid);
} else if (IS_9XX(devid)) {
index += decode_3d(data + index, count - index,
hw_offset + index * 4, &failures);