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Code Issues Releases Wiki Activity

lib/rendercopy*: Use igt_assert

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This commit is contained in:
Daniel Vetter 2014-08-26 15:03:40 +02:00
parent 4428151960
commit baa6f8b34f
6 changed files with 23 additions and 23 deletions
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8
lib/media_fill_gen7.c
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@ -67,7 +67,7 @@ gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
if (ret == 0) if (ret == 0)
ret = drm_intel_bo_mrb_exec(batch->bo, batch_end, ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
NULL, 0, 0, 0); NULL, 0, 0, 0);
assert(ret == 0); igt_assert(ret == 0);
} }
static uint32_t static uint32_t
@ -118,7 +118,7 @@ gen7_fill_surface_state(struct intel_batchbuffer *batch,
batch_offset(batch, ss) + 4, batch_offset(batch, ss) + 4,
buf->bo, 0, buf->bo, 0,
read_domain, write_domain); read_domain, write_domain);
assert(ret == 0); igt_assert(ret == 0);
ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.height = igt_buf_height(buf) - 1;
ss->ss2.width = igt_buf_width(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1;
@ -330,7 +330,7 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch,
curbe_buffer = gen7_fill_curbe_buffer_data(batch, color); curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
interface_descriptor = gen7_fill_interface_descriptor(batch, dst); interface_descriptor = gen7_fill_interface_descriptor(batch, dst);
assert(batch->ptr < &batch->buffer[4095]); igt_assert(batch->ptr < &batch->buffer[4095]);
/* media pipeline */ /* media pipeline */
batch->ptr = batch->buffer; batch->ptr = batch->buffer;
@ -348,7 +348,7 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch,
OUT_BATCH(MI_BATCH_BUFFER_END); OUT_BATCH(MI_BATCH_BUFFER_END);
batch_end = batch_align(batch, 8); batch_end = batch_align(batch, 8);
assert(batch_end < BATCH_STATE_SPLIT); igt_assert(batch_end < BATCH_STATE_SPLIT);
gen7_render_flush(batch, batch_end); gen7_render_flush(batch, batch_end);
intel_batchbuffer_reset(batch); intel_batchbuffer_reset(batch);

8
lib/media_fill_gen8.c
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@ -67,7 +67,7 @@ gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
if (ret == 0) if (ret == 0)
ret = drm_intel_bo_mrb_exec(batch->bo, batch_end, ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
NULL, 0, 0, 0); NULL, 0, 0, 0);
assert(ret == 0); igt_assert(ret == 0);
} }
static uint32_t static uint32_t
@ -121,7 +121,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
batch_offset(batch, ss) + 8 * 4, batch_offset(batch, ss) + 8 * 4,
buf->bo, 0, buf->bo, 0,
read_domain, write_domain); read_domain, write_domain);
assert(ret == 0); igt_assert(ret == 0);
ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.height = igt_buf_height(buf) - 1;
ss->ss2.width = igt_buf_width(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1;
@ -353,7 +353,7 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
curbe_buffer = gen8_fill_curbe_buffer_data(batch, color); curbe_buffer = gen8_fill_curbe_buffer_data(batch, color);
interface_descriptor = gen8_fill_interface_descriptor(batch, dst); interface_descriptor = gen8_fill_interface_descriptor(batch, dst);
assert(batch->ptr < &batch->buffer[4095]); igt_assert(batch->ptr < &batch->buffer[4095]);
/* media pipeline */ /* media pipeline */
batch->ptr = batch->buffer; batch->ptr = batch->buffer;
@ -371,7 +371,7 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
OUT_BATCH(MI_BATCH_BUFFER_END); OUT_BATCH(MI_BATCH_BUFFER_END);
batch_end = batch_align(batch, 8); batch_end = batch_align(batch, 8);
assert(batch_end < BATCH_STATE_SPLIT); igt_assert(batch_end < BATCH_STATE_SPLIT);
gen8_render_flush(batch, batch_end); gen8_render_flush(batch, batch_end);
intel_batchbuffer_reset(batch); intel_batchbuffer_reset(batch);

8
lib/media_fill_gen8lp.c
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@ -67,7 +67,7 @@ gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
if (ret == 0) if (ret == 0)
ret = drm_intel_bo_mrb_exec(batch->bo, batch_end, ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
NULL, 0, 0, 0); NULL, 0, 0, 0);
assert(ret == 0); igt_assert(ret == 0);
} }
static uint32_t static uint32_t
@ -121,7 +121,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
batch_offset(batch, ss) + 8 * 4, batch_offset(batch, ss) + 8 * 4,
buf->bo, 0, buf->bo, 0,
read_domain, write_domain); read_domain, write_domain);
assert(ret == 0); igt_assert(ret == 0);
ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.height = igt_buf_height(buf) - 1;
ss->ss2.width = igt_buf_width(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1;
@ -345,7 +345,7 @@ gen8lp_media_fillfunc(struct intel_batchbuffer *batch,
curbe_buffer = gen8_fill_curbe_buffer_data(batch, color); curbe_buffer = gen8_fill_curbe_buffer_data(batch, color);
interface_descriptor = gen8_fill_interface_descriptor(batch, dst); interface_descriptor = gen8_fill_interface_descriptor(batch, dst);
assert(batch->ptr < &batch->buffer[4095]); igt_assert(batch->ptr < &batch->buffer[4095]);
/* media pipeline */ /* media pipeline */
batch->ptr = batch->buffer; batch->ptr = batch->buffer;
@ -363,7 +363,7 @@ gen8lp_media_fillfunc(struct intel_batchbuffer *batch,
OUT_BATCH(MI_BATCH_BUFFER_END); OUT_BATCH(MI_BATCH_BUFFER_END);
batch_end = batch_align(batch, 8); batch_end = batch_align(batch, 8);
assert(batch_end < BATCH_STATE_SPLIT); igt_assert(batch_end < BATCH_STATE_SPLIT);
gen8_render_flush(batch, batch_end); gen8_render_flush(batch, batch_end);
intel_batchbuffer_reset(batch); intel_batchbuffer_reset(batch);

4
lib/rendercopy_gen6.c
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@ -102,7 +102,7 @@ gen6_render_flush(struct intel_batchbuffer *batch,
if (ret == 0) if (ret == 0)
ret = drm_intel_gem_bo_context_exec(batch->bo, context, ret = drm_intel_gem_bo_context_exec(batch->bo, context,
batch_end, 0); batch_end, 0);
assert(ret == 0); igt_assert(ret == 0);
} }
static uint32_t static uint32_t
@ -132,7 +132,7 @@ gen6_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf,
batch_offset(batch, ss) + 4, batch_offset(batch, ss) + 4,
buf->bo, 0, buf->bo, 0,
read_domain, write_domain); read_domain, write_domain);
assert(ret == 0); igt_assert(ret == 0);
ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.height = igt_buf_height(buf) - 1;
ss->ss2.width = igt_buf_width(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1;

8
lib/rendercopy_gen7.c
View File

@ -77,14 +77,14 @@ gen7_render_flush(struct intel_batchbuffer *batch,
if (ret == 0) if (ret == 0)
ret = drm_intel_gem_bo_context_exec(batch->bo, context, ret = drm_intel_gem_bo_context_exec(batch->bo, context,
batch_end, 0); batch_end, 0);
assert(ret == 0); igt_assert(ret == 0);
} }
static uint32_t static uint32_t
gen7_tiling_bits(uint32_t tiling) gen7_tiling_bits(uint32_t tiling)
{ {
switch (tiling) { switch (tiling) {
default: assert(0); default: igt_assert(0);
case I915_TILING_NONE: return 0; case I915_TILING_NONE: return 0;
case I915_TILING_X: return GEN7_SURFACE_TILED; case I915_TILING_X: return GEN7_SURFACE_TILED;
case I915_TILING_Y: return GEN7_SURFACE_TILED | GEN7_SURFACE_TILED_Y; case I915_TILING_Y: return GEN7_SURFACE_TILED | GEN7_SURFACE_TILED_Y;
@ -128,7 +128,7 @@ gen7_bind_buf(struct intel_batchbuffer *batch,
batch_offset(batch, ss) + 4, batch_offset(batch, ss) + 4,
buf->bo, 0, buf->bo, 0,
read_domain, write_domain); read_domain, write_domain);
assert(ret == 0); igt_assert(ret == 0);
return batch_offset(batch, ss); return batch_offset(batch, ss);
} }
@ -579,7 +579,7 @@ void gen7_render_copyfunc(struct intel_batchbuffer *batch,
batch_end = batch->ptr - batch->buffer; batch_end = batch->ptr - batch->buffer;
batch_end = ALIGN(batch_end, 8); batch_end = ALIGN(batch_end, 8);
assert(batch_end < BATCH_STATE_SPLIT); igt_assert(batch_end < BATCH_STATE_SPLIT);
gen7_render_flush(batch, context, batch_end); gen7_render_flush(batch, context, batch_end);
intel_batchbuffer_reset(batch); intel_batchbuffer_reset(batch);

10
lib/rendercopy_gen8.c
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@ -107,7 +107,7 @@ static void annotation_add_state(struct annotations_context *ctx,
uint32_t start_offset, uint32_t start_offset,
size_t size) size_t size)
{ {
assert(ctx->index < MAX_ANNOTATIONS); igt_assert(ctx->index < MAX_ANNOTATIONS);
add_annotation(&ctx->annotations[ctx->index++], add_annotation(&ctx->annotations[ctx->index++],
AUB_TRACE_TYPE_NOTYPE, 0, AUB_TRACE_TYPE_NOTYPE, 0,
@ -174,7 +174,7 @@ gen6_render_flush(struct intel_batchbuffer *batch,
if (ret == 0) if (ret == 0)
ret = drm_intel_gem_bo_context_exec(batch->bo, context, ret = drm_intel_gem_bo_context_exec(batch->bo, context,
batch_end, 0); batch_end, 0);
assert(ret == 0); igt_assert(ret == 0);
} }
/* Mostly copy+paste from gen6, except height, width, pitch moved */ /* Mostly copy+paste from gen6, except height, width, pitch moved */
@ -213,7 +213,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf,
batch_offset(batch, ss) + 8 * 4, batch_offset(batch, ss) + 8 * 4,
buf->bo, 0, buf->bo, 0,
read_domain, write_domain); read_domain, write_domain);
assert(ret == 0); igt_assert(ret == 0);
ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.height = igt_buf_height(buf) - 1;
ss->ss2.width = igt_buf_width(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1;
@ -944,7 +944,7 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
scissor_state = gen6_create_scissor_rect(batch); scissor_state = gen6_create_scissor_rect(batch);
/* TODO: theree is other state which isn't setup */ /* TODO: theree is other state which isn't setup */
assert(batch->ptr < &batch->buffer[4095]); igt_assert(batch->ptr < &batch->buffer[4095]);
batch->ptr = batch->buffer; batch->ptr = batch->buffer;
@ -1007,7 +1007,7 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
OUT_BATCH(MI_BATCH_BUFFER_END); OUT_BATCH(MI_BATCH_BUFFER_END);
batch_end = batch_align(batch, 8); batch_end = batch_align(batch, 8);
assert(batch_end < BATCH_STATE_SPLIT); igt_assert(batch_end < BATCH_STATE_SPLIT);
annotation_add_batch(&aub_annotations, batch_end); annotation_add_batch(&aub_annotations, batch_end);
dump_batch(batch); dump_batch(batch);